首页>74LVC162373ADGG>规格书详情
74LVC162373ADGG数据手册集成电路(IC)的锁存器规格书PDF

厂商型号 |
74LVC162373ADGG |
参数属性 | 74LVC162373ADGG 封装/外壳为48-TFSOP(0.240",6.10mm 宽);包装为管件;类别为集成电路(IC)的锁存器;产品描述:IC 16BIT D TRANSP LATCH 48TSSOP |
功能描述 | 16-bit D-type transparent latch; 30 Ohm series termination resistors; 5 V tolerant inputs/outputs; 3-state |
封装外壳 | 48-TFSOP(0.240",6.10mm 宽) |
制造商 | Nexperia Nexperia B.V. All rights reserved |
中文名称 | 安世 安世半导体(中国)有限公司 |
数据手册 | |
更新时间 | 2025-8-7 11:40:00 |
人工找货 | 74LVC162373ADGG价格和库存,欢迎联系客服免费人工找货 |
74LVC162373ADGG规格书详情
描述 Description
The 74LVC162373A and 74LVCH162373A are 16-bit D-type transparent latches with separate D-type inputs with bus hold (74LVCH162373A only) for each latch and 3-state outputs for bus-oriented applications. One latch enable (pin nLE) input and one output enable (pin nOE) are provided for each octal. Inputs can be driven from either 3.3 V or 5 V devices. When disabled, up to 5.5 V can be applied to the outputs. These features allow the use of these devices in mixed 3.3 V and 5 V applications. The device consists of two sections of eight D-type transparent latches with 3-state true outputs. When pin nLE is HIGH, data at the corresponding data inputs (pins nDn) enter the latches. In this condition, the latches are transparent, that is, the latch output changes each time its corresponding data inputs changes. When pin nLE is LOW, the latches store the information that was present at the data inputs a set-up time preceding the HIGH to LOW transition of pin nLE.When pin nOE is LOW, the contents of the eight latches are available at the outputs. When pin nOE is HIGH, the outputs go to the high-impedance OFF-state. Operation of the nOE input does not affect the state of the latches.
The device is designed with 30 Ω series termination resistors in both HIGH and LOW output stages to reduce line noise. Bus hold on data inputs eliminates the need for external pull-up resistors to hold unused inputs.
特性 Features
• 5 V tolerant inputs/outputs for interfacing with 5 V logic
• Wide supply voltage range from 1.2 V to 3.6 V
• CMOS low power consumption
• Multibyte flow-through standard pinout architecture
• Multiple low inductance supply pins for minimum noise and ground bounce
• Direct interface with TTL levels
• All data inputs have bushold (74LVCH162373A only)
• High-impedance when VCC = 0 V
• Complies with JEDEC standard:
• JESD8-7A (1.65 V to 1.95 V)
• JESD8-5A (2.3 V to 2.7 V)
• JESD8-C/JESD36 (2.7 V to 3.6 V)
• ESD protection:
• HBM JESD22-A114F exceeds 2000 V
• MM JESD22-A115-B exceeds 200 V
• CDM JESD22-C101E exceeds 1000 V
• Specified from -40 °C to +85 °C and -40 °C to +125 °C
技术参数
- 制造商编号
:74LVC162373ADGG
- 生产厂家
:Nexperia
- VCC (V)
:1.2 - 3.6
- Logic switching levels
:TTL
- Output drive capability (mA)
:± 12
- tpd (ns)
:3.2
- Power dissipation considerations
:low
- Tamb (°C)
:-40~125
- Rth(j-a) (K/W)
:82
- Ψth(j-top) (K/W)
:2.0
- Rth(j-c) (K/W)
:37
- Package name
:TSSOP48
供应商 | 型号 | 品牌 | 批号 | 封装 | 库存 | 备注 | 价格 |
---|---|---|---|---|---|---|---|
恩XP |
22+ |
TSSOP48 |
20000 |
原装现货,实单支持 |
询价 | ||
NEXPERIA/安世 |
22+ |
SMD |
12245 |
现货,原厂原装假一罚十! |
询价 | ||
恩XP |
21+ |
TSSOP-24 |
8080 |
只做原装,质量保证 |
询价 | ||
恩XP |
2511 |
N/A |
6000 |
电子元器件采购降本 30%!盈慧通原厂直采,砍掉中间差价 |
询价 | ||
Nexperia(安世) |
2021+ |
TSSOP-48 |
503 |
询价 | |||
恩XP |
2450+ |
8540 |
只做原装正品假一赔十为客户做到零风险!! |
询价 | |||
恩XP |
24+ |
TSSOP-24 |
30000 |
原装正品公司现货,假一赔十! |
询价 | ||
Nexperia |
23+ |
TO-18 |
12800 |
原装正品代理商最优惠价格,现货或订货 |
询价 | ||
24+ |
N/A |
46000 |
一级代理-主营优势-实惠价格-不悔选择 |
询价 | |||
NEXPERIA/安世 |
25+ |
SOT362 |
600000 |
NEXPERIA/安世全新特价74LVC162373ADGG即刻询购立享优惠#长期有排单订 |
询价 |