74LVC162245ADGG数据手册集成电路（IC）的缓冲器驱动器接收器收发器规格书PDF

描述 Description

The 74LVC162245A; 74LVCH162245A are 16-bit transceivers with non-inverting 3-state bus compatible outputs in both send and receive directions. Two send/receive (nDIR) inputs control direction, and two output enable (nOE) inputs make cascading easy. The nOE inputs control the outputs so that the buses are effectively isolated. This device can be used as two 8-bit transceivers or one 16-bit transceiver.
Inputs can be driven from either 3.3 V or 5 V devices. When disabled, up to 5.5 V can be applied to the outputs. These features allow the use of these devices as translators in mixed 3.3 V and 5 V applications.
The 74LVCH162245A bus hold on data inputs eliminates the need for external pull-up resistors to hold unused inputs.
Both HIGH and LOW output stages include 30 Ω series termination resistors to reduce line noise.

特性 Features

• 5 V tolerant inputs/outputs for interfacing with 5 V logic
• Wide supply voltage range from 1.2 V to 3.6 V
• CMOS low power consumption
• Multibyte flow-through standard pin-out architecture
• Low inductance multiple power and ground pins for minimum noise and ground bounce
• Direct interface with TTL levels
• Integrated 30 Ω termination resistors
• High-impedance when VCC = 0 V
• All data inputs have bus hold (74LVCH162245A only)
• Complies with JEDEC standard:
• JESD8-7A (1.65 V to 1.95 V)
• JESD8-5A (2.3 V to 2.7 V)
• JESD8-C/JESD36 (2.7 V to 3.6 V)

• ESD protection:
• HBM JESD22-A114F exceeds 2000 V
• MM JESD22-A115-B exceeds 200 V
• CDM ANSI/ESDA/Jedec JS-002 exceeds 1000 V

• Specified from -40 °C to +85 °C and from -40 °C to +125 °C