74LS393中文资料仙童半导体数据手册PDF规格书

General Description

Each of these monolithic circuits contains eight master-slave flip-flops and additional gating to implement two individual four-bit counters in a single package. The DM74LS393 comprises two independent four-bit binary counters each having a clear and a clock input. N-bit binary counters can be implemented with each package providing the capability of divide-by-256. The DM74LS393 has parallel outputs from each counter stage so that any submultiple of the input count frequency is available for system-timing signals.

特性 Features

■ Dual version of the popular DM74LS93

■ DM74LS393 dual 4-bit binary counter with individual clocks

■ Direct clear for each 4-bit counter

■ Dual 4-bit versions can significantly improve system densities by reducing counter package count by 50

■ Typical maximum count frequency 35 MHz

■ Buffered outputs reduce possibility of collector commutation