74LS279中文资料仙童半导体数据手册PDF规格书

General Description

The DM74LS279 consists of four individual and independent Set-Reset Latches with active low inputs. Two of the four latches have an additional Sinput ANDed with the primary Sinput. A LOW on any Sinput while the Rinput is HIGH will be stored in the latch and appear on the corresponding Q output as a HIGH. A LOW on the Rinput while the Sinput is HIGH will clear the Q output to a LOW. Simultaneous transition of the Rand Sinputs from LOW-toHIGH will cause the Q output to be indeterminate. Both inputs are voltage level triggered and are not affected by

transition time of the input data.