General Description

The LCX126 contains four independent non-inverting buffers with 3-STATE outputs. Each output is disabled when the associated output-enable (OE) input is LOW. The inputs tolerate voltages up to 7V allowing the interface of 5V systems to 3V systems.

The 74LCX126 is fabricated with an advanced CMOS technology to achieve high speed operation while maintaining CMOS low power dissipation.

Features

■ 5V tolerant inputs and outputs

■ 2.3V–3.6V VCC specifications provided

■ 5.5ns tPD max. (VCC = 3.3V), 10µA ICC max.

■ Power down high impedance inputs and outputs

■ Supports live insertion/withdrawal(1)

■ ±24mA output drive (VCC = 3.0V)

■ Implements proprietary noise/EMI reduction circuitry

■ Latch-up performance exceeds JEDEC 78 conditions

■ ESD performance:

– Human body model > 2000V

– Machine model > 100V

■ Leadless DQFN package

74LCX126M属于集成电路（IC） > 缓冲器，驱动器，接收器，收发器。安森美半导体公司制造生产的74LCX126M缓冲器，驱动器，接收器，收发器逻辑缓冲器、驱动器、接收器和收发器允许隔离对某个电路的逻辑信号的访问，以用于另一电路。缓冲器将其输入信号（不变或反相）传递到其输出，并可能用于清除弱信号或驱动负载。在布尔逻辑仿真器中，缓冲器主要用于增加传播延迟。逻辑接收器和收发器允许在数据总线之间进行隔离通信。