4-bit binary ripple counter

GENERAL DESCRIPTION The 74HC/HCT93 are high-speed Si-gate CMOS devices and are pin compatible with low power Schottky TTL (LSTTL). They are specified in compliance with JEDEC standard no. 7A. FEATURES • Various counting modes • Asynchronous master reset • Output capability: standard • I

文件：45.94 Kbytes 页数：7 Pages

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飞利浦

Programmable ripple counter with oscillator 3-State

DESCRIPTION The 74HC/HCT9323A are high-speed Si-gate CMOS devices. They are specified in compliance with JEDEC standard no. 7A. FEATURES • 8-pin space saving package • Programmable 3-stage ripple counter • Suitable for over-tone crystal application up to 85MHz (VCC = 5V ±10) •

文件：44.43 Kbytes 页数：6 Pages

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飞利浦

Programmable ripple counter with oscillator 3-State

DESCRIPTION The 74HC/HCT9323A are high-speed Si-gate CMOS devices. They are specified in compliance with JEDEC standard no. 7A. FEATURES • 8-pin space saving package • Programmable 3-stage ripple counter • Suitable for over-tone crystal application up to 85MHz (VCC = 5V ±10) •

文件：44.43 Kbytes 页数：6 Pages

PHI

飞利浦

4-bit binary ripple counter

GENERAL DESCRIPTION The 74HC/HCT93 are high-speed Si-gate CMOS devices and are pin compatible with low power Schottky TTL (LSTTL). They are specified in compliance with JEDEC standard no. 7A. FEATURES • Various counting modes • Asynchronous master reset • Output capability: standard • I

文件：45.94 Kbytes 页数：7 Pages

PHI

飞利浦

4-bit binary ripple counter

GENERAL DESCRIPTION The 74HC/HCT93 are high-speed Si-gate CMOS devices and are pin compatible with low power Schottky TTL (LSTTL). They are specified in compliance with JEDEC standard no. 7A. FEATURES • Various counting modes • Asynchronous master reset • Output capability: standard • I

文件：45.94 Kbytes 页数：7 Pages

PHI

飞利浦