74HCT9046A集成电路（IC）的时钟发生器PLL频率合成器规格书PDF中文资料

1. General description

The 74HCT9046A. This device features reduced input threshold levels to allow interfacing to TTL

logic levels. Inputs also include clamp diodes, this enables the use of current limiting resistors to

interface inputs to voltages in excess of VCC.

2. Features and benefits

• Operation power supply voltage range from 4.5 V to 5.5 V

• Low power consumption

• Complies with JEDEC standard no. 7A

• Inhibit control for ON/OFF keying and for low standby power consumption

• Center frequency up to 17 MHz (typical) at VCC = 5.5 V

• Choice of two phase comparators:

• PC1: EXCLUSIVE-OR

• PC2: Edge-triggered JK flip-flop

• No dead zone of PC2

• Charge pump output on PC2, whose current is set by an external resistor Rbias

• Center frequency tolerance ±10

• Excellent Voltage Controlled Oscillator (VCO) linearity

• Low frequency drift with supply voltage and temperature variations

• On-chip band gap reference

• Glitch free operation of VCO, even at very low frequencies

• Zero voltage offset due to operational amplifier buffering

• ESD protection:

• HBM JESD22-A114F exceeds 2000 V

• MM JESD22-A115-A exceeds 200 V

3. Applications

• FM modulation and demodulation where a small center frequency tolerance is essential

• Frequency synthesis and multiplication where a low jitter is required (e.g. video

picture-in-picture)

• Frequency discrimination

• Tone decoding

• Data synchronization and conditioning

• Voltage-to-frequency conversion

• Motor-speed control