74HCT4060DB数据手册集成电路（IC）的计数器除法器规格书PDF

描述 Description

14-stage binary ripple counter with oscillator - The 74HC4060; 74HCT4060 is a 14-stage ripple-carry counter/divider and oscillator with three oscillator terminals (RS, RTC and CTC), ten buffered parallel outputs (Q3 to Q9 and Q11 to Q13) and an overriding asynchronous master reset (MR). The oscillator configuration allows design of either RC or crystal oscillator circuits. The oscillator may be replaced by an external clock signal at input RS. In this case, keep the oscillator pins (RTC and CTC) floating. The counter advances on the HIGH-to-LOW transition of RS. A HIGH level on MR clears all counter stages and forces all outputs LOW, independent of the other input conditions. Inputs include clamp diodes. This enables the use of current limiting resistors to interface inputs to voltages in excess of VCC.

特性 Features

·All active components on chip
·RC or crystal oscillator configuration
·Complies with JEDEC standard no. 7 A
·Input levels:·For 74HC4060: CMOS level
·For 74HCT4060: TTL level

应用 Application

·Control counters
·Timers
·Frequency dividers
·Time-delay circuits