74HCT4053PW中文资料安世数据手册PDF规格书

1. General description

The 74HC4053; 74HCT4053 is a triple single-pole double-throw analog switch (3x SPDT) suitable

for use in analog or digital 2:1 multiplexer/demultiplexer applications. Each switch features a digital

select input (Sn), two independent inputs/outputs (nY0 and nY1) and a common input/output (nZ).

A digital enable input (E) is common to all switches. When E is HIGH, the switches are turned off.

Inputs include clamp diodes. This enables the use of current limiting resistors to interface inputs to

voltages in excess of VCC.

2. Features and benefits

• Wide analog input voltage range from -5 V to +5 V

• CMOS low power dissipation

• High noise immunity

• Latch-up performance exceeds 100 mA per JESD78 Class II Level B

• Complies with JEDEC standard:

• JESD8C (2.7 V to 3.6 V)

• JESD7A (2.0 V to 6.0 V)

• Low ON resistance:

• 80 Ω (typical) at VCC - VEE = 4.5 V

• 70 Ω (typical) at VCC - VEE = 6.0 V

• 60 Ω (typical) at VCC - VEE = 9.0 V

• Logic level translation: to enable 5 V logic to communicate with ±5 V analog signals

• Typical ‘break before make’ built-in

• ESD protection:

• HBM JESD22-A114F exceeds 2000 V

• MM JESD22-A115-A exceeds 200 V

• CDM JESD22-C101E exceeds 1000 V

• Multiple package options

• Specified from -40 °C to +85 °C and -40 °C to +125 °C

3. Applications

• Analog multiplexing and demultiplexing

• Digital multiplexing and demultiplexing

• Signal gating