Triple 2-channel analog multiplexer/demultiplexer

General description The 74HC4053-Q100; 74HCT4053-Q100 is a high-speed Si-gate CMOS device and is pin compatible with Low-power Schottky TTL (LSTTL). It is specified in compliance with JEDEC standard no. 7A. Features and benefits ■ Automotive product qualification in accordance with AEC-Q100 (Gr

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Triple 2-channel analog multiplexer/demultiplexer

1. General description The 74HC4053-Q100; 74HCT4053-Q100 is a triple single-pole double-throw analog switch (3x SPDT) suitable for use in analog or digital 2:1 multiplexer/demultiplexer applications. Each switch features a digital select input (Sn), two independent inputs/outputs (nY0 and nY1)

文件：366.16 Kbytes 页数：25 Pages

NEXPERIA

安世

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NEXPERIA/安世

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TSSOP14

恩XP

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NA

NEXPERIA/安世

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