74HCT4052BZ数据手册Nexperia中文资料规格书

描述 Description

The 74HC4052; 74HCT4052 is a dual single-pole quad-throw analog switch (2 × SP4T) suitable for use in analog or digital 4:1 multiplexer/demultiplexer applications. Each switch features four independent inputs/outputs (nY0, nY1, nY2 and nY3) and a common input/output (nZ). A digital enable input (E) and two digital select inputs (S0 and S1) are common to both switches. When E is HIGH, the switches are turned off. Inputs include clamp diodes. This enables the use of current limiting resistors to interface inputs to voltages in excess of VCC.

特性 Features

• Wide analog input voltage range from -5 V to +5 V
• CMOS low power dissipation
• High noise immunity
• Latch-up performance exceeds 100 mA per JESD 78 Class II Level B
• Low ON resistance:
• 80 Ω (typical) at VCC - VEE = 4.5 V
• 70 Ω (typical) at VCC - VEE = 6.0 V
• 60 Ω (typical) at VCC - VEE = 9.0 V

• Logic level translation: to enable 5 V logic to communicate with ±5 V analog signals
• Typical ‘break before make’ built-in
• Complies with JEDEC standards:
• JESD8C (2.7 V to 3.6 V)
• JESD7A (2.0 V to 6.0 V)

• Input levels:
• For 74HC4052: CMOS level
• For 74HCT4052: TTL level

• ESD protection:
• HBM JESD22-A114F exceeds 2000 V
• MM JESD22-A115-A exceeds 200 V
• CDM JESD22-C101E exceeds 1000 V

• Specified from -40 °C to +85 °C and -40 °C to +125 °C

应用 Application

• Analog multiplexing and demultiplexing
• Digital multiplexing and demultiplexing
• Signal gating