Johnson decade counter with 10 decoded outputs

GENERAL DESCRIPTION The 74HC/HCT4017 are high-speed Si-gate CMOS devices and are pin compatible with the “4017” of the “4000B” series. They are specified in compliance with JEDEC standard no. 7A. FEATURES • Output capability: standard • ICC category: MSI

文件：86.49 Kbytes 页数：12 Pages

PHI

飞利浦

Johnson decade counter with 10 decoded outputs

General description The 74HC4017; 74HCT4017 is a high-speed Si-gate CMOS device and is pin compatible with the HEF4017. The 74HC4017; 74HCT4017 is a 5-stage Johnson decade counter with 10 decoded active HIGH outputs (Q0 to Q9), an active LOW output from the most significant flip-flop (Q5-9), act

文件：132.49 Kbytes 页数：23 Pages

恩XP

Johnson decade counter with 10 decoded outputs

GENERAL DESCRIPTION The 74HC/HCT4017 are high-speed Si-gate CMOS devices and are pin compatible with the “4017” of the “4000B” series. They are specified in compliance with JEDEC standard no. 7A. FEATURES • Output capability: standard • ICC category: MSI

文件：86.49 Kbytes 页数：12 Pages

PHI

飞利浦

Johnson decade counter with 10 decoded outputs

GENERAL DESCRIPTION The 74HC/HCT4017 are high-speed Si-gate CMOS devices and are pin compatible with the “4017” of the “4000B” series. They are specified in compliance with JEDEC standard no. 7A. FEATURES • Output capability: standard • ICC category: MSI

文件：86.49 Kbytes 页数：12 Pages

PHI

飞利浦

Johnson decade counter with 10 decoded outputs

1. General description The 74HC4017; 74HCT4017 is a 5-stage Johnson decade counter with 10 decoded outputs (Q0 to Q9), an output from the most significant flip-flop (Q5-9), two clock inputs (CP0 and CP1) and an overriding asynchronous master reset input (MR). The counter is advanced by either a

文件：310.09 Kbytes 页数：20 Pages

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