74HCT393PW集成电路（IC）的计数器除法器规格书PDF中文资料

1. General description

The 74HC393; 74HCT393 is a dual 4-stage binary ripple counter. Each counter features a clock

input (nCP), an overriding asynchronous master reset input (nMR) and 4 buffered parallel outputs

(nQ0 to nQ3). The counter advances on the HIGH-to-LOW transition of nCP. A HIGH on nMR

clears the counter stages and forces the outputs LOW, independent of the state of nCP. Inputs

include clamp diodes. This enables the use of current limiting resistors to interface inputs to

voltages in excess of VCC.

2. Features and benefits

• Wide supply voltage range from 2.0 V to 6.0 V

• CMOS low power dissipation

• High noise immunity

• Latch-up performance exceeds 100 mA per JESD 78 Class II Level B

• Complies with JEDEC standards:

• JESD8C (2.7 V to 3.6 V)

• JESD7A (2.0 V to 6.0 V)

• Input levels:

• For 74HC393: CMOS level

• For 74HCT393: TTL level

• ESD protection:

• HBM JESD22-A114F exceeds 2000 V

• MM JESD22-A115-A exceeds 200 V.

• Two 4-bit binary counters with individual clocks

• Divide by any binary module up to 28 in one package

• Two master resets to clear each 4-bit counter individually