3-to-8 line decoder/demultiplexer

GENERAL DESCRIPTION The 74HC/HCT238 are high-speed Si-gate CMOS devices and are pin compatible with low power Schottky TTL (LSTTL). They are specified in compliance with JEDEC standard no. 7A. FEATURES • Demultiplexing capability • Multiple input enable for easy expansion • Ideal for mem

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PHI

飞利浦

3-to-8 line decoder/demultiplexer

General description 74HC238 and 74HCT238 are high-speed Si-gate CMOS devices and are pin compatible with Low-Power Schottky TTL (LSTTL). The 74HC238/74HCT238 decoders accept three binary weighted address inputs (A0, A1, A2) and when enabled, provide 8 mutually exclusive active HIGH outputs (

文件：120.28 Kbytes 页数：18 Pages

恩XP

3-to-8 line decoder/demultiplexer

1. General description The 74HC238; 74HCT238 decodes three binary weighted address inputs (A0, A1 and A2) to eight mutually exclusive outputs (Y0 to Y7). The device features three enable inputs (E1 and E2 and E3). Every output will be LOW unless E1 and E2 are LOW and E3 is HIGH. This multiple e

文件：267.32 Kbytes 页数：15 Pages

NEXPERIA

安世

3-to-8 line decoder/demultiplexer

1. General description The 74HC238-Q100; 74HCT238-Q100 decodes three binary weighted address inputs (A0, A1 and A2) to eight mutually exclusive outputs (Y0 to Y7). The device features three enable inputs (E1 and E2 and E3). Every output will be LOW unless E1 and E2 are LOW and E3 is HIGH. This

文件：255.08 Kbytes 页数：15 Pages

NEXPERIA

安世

3-to-8 line decoder/demultiplexer

文件：244.46 Kbytes 页数：17 Pages

NEXPERIA

安世

3-to-8 line decoder/demultiplexer

The 74HC238; 74HCT238 decodes three binary weighted address inputs (A0, A1 and A2) to eight mutually exclusive outputs (Y0 to Y7). The device features three enable inputs (E1 and E2 and E3). Every output will be LOW unless E1 and E2 are LOW and E3 is HIGH. This multiple enable function allows easy p • Demultiplexing capability\n• Multiple input enable for easy expansion\n• Ideal for memory chip select decoding\n• Active HIGH mutually exclusive outputs\n• Multiple package options\n• Complies with JEDEC standard no. 7A\n• Input levels:• For 74HC238: CMOS level\n• For 74HCT238: TTL level\n\n• ESD ;

Nexperia

安世

3-to-8 line decoder/demultiplexer

The 74HC238-Q100; 74HCT238-Q100 decodes three binary weighted address inputs (A0, A1 and A2) to eight mutually exclusive outputs (Y0 to Y7). The device features three enable inputs (E1 and E2 and E3). Every output will be LOW unless E1 and E2 are LOW and E3 is HIGH. This multiple enable function all • Automotive product qualification in accordance with AEC-Q100 (Grade 1)• Specified from -40 °C to +85 °C and from -40 °C to +125 °C\n\n• Demultiplexing capability\n• Multiple input enable for easy expansion\n• Ideal for memory chip select decoding\n• Active HIGH mutually exclusive outputs\n• Multip;

Nexperia

安世

Package：16-TSSOP（0.173"，4.40mm 宽）；包装：管件 类别：集成电路（IC） 信号开关，多路复用器，解码器 描述：IC DECODER/DEMUX 1X3:8 16TSSOP

Nexperia USA Inc.

Package：16-TSSOP（0.173"，4.40mm 宽）；包装：管件 类别：集成电路（IC） 信号开关，多路复用器，解码器 描述：IC DECODER/DEMUX 1X3:8 16TSSOP

Nexperia USA Inc.

Package：16-TSSOP（0.173"，4.40mm 宽）；包装：卷带（TR） 类别：集成电路（IC） 信号开关，多路复用器，解码器 描述：IC DECODER/DEMUX 1X3:8 16TSSOP

Nexperia USA Inc.