Presettable synchronous 4-bit binary counter; asynchronous reset

GENERAL DESCRIPTION The 74HC/HCT161 are high-speed Si-gate CMOS devices and are pin compatible with low power Schottky TTL (LSTTL). They are specified in compliance with JEDEC standard no. 7A. FEATURES • Synchronous counting and loading • Two count enable inputs for n-bit cascading • Positive

文件：83.61 Kbytes 页数：12 Pages

PHI

PHI

Presettable synchronous 4-bit binary counter; asynchronous reset

GENERAL DESCRIPTION The 74HC/HCT161 are high-speed Si-gate CMOS devices and are pin compatible with low power Schottky TTL (LSTTL). They are specified in compliance with JEDEC standard no. 7A. FEATURES • Synchronous counting and loading • Two count enable inputs for n-bit cascading • Positive

文件：83.61 Kbytes 页数：12 Pages

PHI

PHI

Presettable synchronous 4-bit binary counter; asynchronous reset

GENERAL DESCRIPTION The 74HC/HCT161 are high-speed Si-gate CMOS devices and are pin compatible with low power Schottky TTL (LSTTL). They are specified in compliance with JEDEC standard no. 7A. FEATURES • Synchronous counting and loading • Two count enable inputs for n-bit cascading • Positive

文件：83.61 Kbytes 页数：12 Pages

PHI

PHI

Presettable synchronous 4-bit binary counter; asynchronous reset

GENERAL DESCRIPTION The 74HC/HCT161 are high-speed Si-gate CMOS devices and are pin compatible with low power Schottky TTL (LSTTL). They are specified in compliance with JEDEC standard no. 7A. FEATURES • Synchronous counting and loading • Two count enable inputs for n-bit cascading • Positive

文件：83.61 Kbytes 页数：12 Pages

PHI

PHI

High Speed CMOS Logic Presettable Counters

文件：65.79 Kbytes 页数：10 Pages

TI

德州仪器