74HCT157DB中文资料74HCT157DB - Quad 2-input multiplexer 数据手册Nexperia规格书

描述 Description

Quad 2-input multiplexer - The 74HC157; 74HCT157 is a high-speed Si-gate CMOS device and is pin compatible with Low-power Schottky TTL. It is specified in compliance with JEDEC standard no. 7A. The 74HC/HCT157 are quad 2-input multiplexers which select 4 bits of data from two sources under the control of a common data select input (S). The enable input (E) is active LOW. When E is HIGH, all of the outputs (1Y to 4Y) are forced LOW regardless of all other input conditions. Moving the data from two groups of registers to four common output buses is a common use of the 74HC/HCT157. The state of the common data select input (S) determines the particular register from which the data comes. It can also be used as function generator. The device is useful for implementing highly irregular logic by generating any four of the 16 different functions of two variables with one variable common. The 74HC/HCT157 is logic implementation of a 4-pole, 2-position switch, where the position of the switch is determined by the logic levels applied to S. The logic equations are: 1Y = E × (1I1 × S + 1I0 × S) 2Y = E × (2I1 × S + 2I0 × S) 3Y = E × (3I1 × S + 3I0 × S) 4Y = E × (4I1 × S + 4I0 × S) The 74HC/HCT157 is identical to the 74HC158 but has non-inverting (true) outputs.

特性 Features

·Low-power dissipation
·Non-inverting data path
·ESD protection: ·HBM JESD22-A114F exceeds 2000 V
·MM JESD22-A115-A exceeds 200 V