74HCT112PW集成电路（IC）的触发器规格书PDF中文资料

厂商型号	74HCT112PW
参数属性	74HCT112PW 封装/外壳为16-TSSOP（0.173"，4.40mm 宽）；包装为卷带（TR）剪切带（CT）Digi-Reel® 得捷定制卷带；类别为集成电路（IC）的触发器；产品描述：IC FF JK TYPE DUAL 1BIT 16TSSOP
功能描述	Dual JK flip-flop with set and reset; negative-edge trigger
封装外壳	16-TSSOP（0.173"，4.40mm 宽）
文件大小	267.28 Kbytes
页面数量	16 页
生产厂商	Nexperia B.V. All rights reserved
企业简称	NEXPERIA【安世】
中文名称	安世半导体(中国)有限公司官网
原厂标识
数据手册	下载地址一下载地址二到原厂下载
更新时间	2025-5-23 23:01:00
人工找货	74HCT112PW价格和库存，欢迎联系客服免费人工找货

1. General description

The 74HC112; 74HCT112 is a dual negative-edge triggered JK flip-flop. It features individual J and

K inputs, clock (nCP) set (nSD) and reset (nRD) inputs. It also has complementary nQ and nQ

outputs. The set and reset are asynchronous active LOW inputs and operate independently of the

clock input. The J and K inputs control the state changes of the flip-flops as described in the mode

select function table. The J and K inputs must be stable one set-up time prior to the HIGH-to-LOW

clock transition for predictable operation. Inputs include clamp diodes that enable the use of current

limiting resistors to interface inputs to voltages in excess of VCC.

Schmitt-trigger action in the clock input makes the circuit highly tolerant to slower clock rise and fall

times.

2. Features and benefits

• Input levels:

• For 74HC112: CMOS level

• For 74HCT112: TTL level

• Asynchronous set and reset

• Specified in compliance with JEDEC standard no. 7A

• ESD protection:

• HBM JESD22-A114F exceeds 2000 V

• MM JESD22-A115-A exceeds 200 V

• Specified from -40 °C to +85 °C and from -40 °C to +125 °C