74HC73PW集成电路（IC）的触发器规格书PDF中文资料

厂商型号	74HC73PW
参数属性	74HC73PW 封装/外壳为14-TSSOP（0.173"，4.40mm 宽）；包装为卷带（TR）剪切带（CT）Digi-Reel® 得捷定制卷带；类别为集成电路（IC）的触发器；产品描述：IC FF JK TYPE DUAL 1BIT 14TSSOP
功能描述	Dual JK flip-flop with reset; negative-edge trigger
封装外壳	14-TSSOP（0.173"，4.40mm 宽）
文件大小	245.37 Kbytes
页面数量	13 页
生产厂商	Nexperia B.V. All rights reserved
企业简称	NEXPERIA【安世】
中文名称	安世半导体(中国)有限公司官网
原厂标识
数据手册	下载地址一下载地址二到原厂下载
更新时间	2025-8-2 17:02:00
人工找货	74HC73PW价格和库存，欢迎联系客服免费人工找货

1. General description

The 74HC73 is a dual negative edge triggered JK flip-flop with individual J, K, clock (nCP) and

reset (nR) inputs and complementary nQ and nQ outputs. The J and K inputs must be stable

one set-up time prior to the HIGH-to-LOW clock transition for predictable operation. (nR) is

asynchronous, when LOW it overrides the clock and data inputs, forcing the nQ output LOW and

the nQ output HIGH. Schmitt-trigger action in the clock input makes the circuit highly tolerant

to slower clock rise and fall times. Inputs include clamp diodes. This enables the use of current

limiting resistors to interface inputs to voltages in excess of VCC.

2. Features and benefits

• CMOS low-power dissipation

• Wide supply voltage range from 2.0 to 6.0 V

• High noise immunity

• Latch-up performance exceeds 100 mA per JESD 78 Class II Level B

• Complies with JEDEC standards

• JESD8C (2.7 V to 3.6 V)

• JESD7A (2.0 V to 6.0 V)

• ESD protection:

• HBM JESD22-A114F exceeds 2000 V

• MM JESD22-A115-A exceeds 200 V

• Specified from -40 °C to +80 °C and from -40 °C to +125 °C