74HC393D-Q100集成电路（IC）的计数器除法器规格书PDF中文资料

1. General description

The 74HC393-Q100; 74HCT393-Q100 is a dual 4-stage binary ripple counter. Each counter

features a clock input (nCP), an overriding asynchronous master reset input (nMR) and 4 buffered

parallel outputs (nQ0 to nQ3). The counter advances on the HIGH-to-LOW transition of nCP.

A HIGH on nMR clears the counter stages and forces the outputs LOW, independent of the state

of nCP. Inputs include clamp diodes. This enables the use of current limiting resistors to interface

inputs to voltages in excess of VCC.

This product has been qualified to the Automotive Electronics Council (AEC) standard Q100

(Grade 1) and is suitable for use in automotive applications.

2. Features and benefits

• Automotive product qualification in accordance with AEC-Q100 (Grade 1)

• Specified from -40 °C to +85 °C and from -40 °C to +125 °C

• Wide supply voltage range from 2.0 V to 6.0 V

• CMOS low power dissipation

• High noise immunity

• Latch-up performance exceeds 100 mA per JESD 78 Class II Level B

• Complies with JEDEC standards:

• JESD8C (2.7 V to 3.6 V)

• JESD7A (2.0 V to 6.0 V)

• Input levels:

• For 74HC393-Q100: CMOS level

• For 74HCT393-Q100: TTL level

• ESD protection:

• MIL-STD-883, method 3015 exceeds 2000 V

• HBM JESD22-A114F exceeds 2000 V

• MM JESD22-A115-A exceeds 200 V (C = 200 pF, R = 0 Ω)

• Two 4-bit binary counters with individual clocks

• Divide by any binary module up to 28 in one package

• Two master resets to clear each 4-bit counter individually

• DHVQFN package with Side-Wettable Flanks enabling Automatic Optical Inspection (AOI) of

solder joints