Quad 2-input multiplexer; 3-state; inverting

GENERAL DESCRIPTION The 74HC/HCT258 are high-speed Si-gate CMOS devices and are pin compatible with Low power Schottky TTL (LSTTL). They are specified in compliance with JEDEC standard no. 7A. The 74HC/HCT258 have four identical 2-input multiplexers with 3-state outputs, which select 4 bits of d

文件：83.87 Kbytes 页数：16 Pages

PHI

飞利浦

Quad 2-input multiplexer; 3-state; inverting

General description The 74HC258 is a high-speed Si-gate CMOS device and is pin compatible with low power Schottky TTL (LSTTL). The 74HC258 is specified in compliance with JEDEC standard no. 7A. The 74HC258 has four identical 2-input multiplexers with 3-state outputs, which select 4 bits of data

文件：100.22 Kbytes 页数：14 Pages

恩XP

Quad 2-input multiplexer; 3-state; inverting

General description The 74HC258 is a high-speed Si-gate CMOS device and is pin compatible with low power Schottky TTL (LSTTL). The 74HC258 is specified in compliance with JEDEC standard no. 7A. The 74HC258 has four identical 2-input multiplexers with 3-state outputs, which select 4 bits of data

文件：100.22 Kbytes 页数：14 Pages

恩XP

Quad 2-input multiplexer; 3-state; inverting

GENERAL DESCRIPTION The 74HC/HCT258 are high-speed Si-gate CMOS devices and are pin compatible with Low power Schottky TTL (LSTTL). They are specified in compliance with JEDEC standard no. 7A. The 74HC/HCT258 have four identical 2-input multiplexers with 3-state outputs, which select 4 bits of d

文件：83.87 Kbytes 页数：16 Pages

PHI

飞利浦

Quad 2-input multiplexer; 3-state; inverting

GENERAL DESCRIPTION The 74HC/HCT258 are high-speed Si-gate CMOS devices and are pin compatible with Low power Schottky TTL (LSTTL). They are specified in compliance with JEDEC standard no. 7A. The 74HC/HCT258 have four identical 2-input multiplexers with 3-state outputs, which select 4 bits of d

文件：83.87 Kbytes 页数：16 Pages

PHI

飞利浦

Quad 2-input multiplexer; 3-state; inverting

General description The 74HC258 is a high-speed Si-gate CMOS device and is pin compatible with low power Schottky TTL (LSTTL). The 74HC258 is specified in compliance with JEDEC standard no. 7A. The 74HC258 has four identical 2-input multiplexers with 3-state outputs, which select 4 bits of data

文件：100.22 Kbytes 页数：14 Pages

恩XP

Quad 2-input multiplexer; 3-state; inverting

General description The 74HC258 is a high-speed Si-gate CMOS device and is pin compatible with low power Schottky TTL (LSTTL). The 74HC258 is specified in compliance with JEDEC standard no. 7A. The 74HC258 has four identical 2-input multiplexers with 3-state outputs, which select 4 bits of data

文件：100.22 Kbytes 页数：14 Pages

恩XP

Quad 2-input multiplexer; 3-state; inverting

GENERAL DESCRIPTION The 74HC/HCT258 are high-speed Si-gate CMOS devices and are pin compatible with Low power Schottky TTL (LSTTL). They are specified in compliance with JEDEC standard no. 7A. The 74HC/HCT258 have four identical 2-input multiplexers with 3-state outputs, which select 4 bits of d

文件：83.87 Kbytes 页数：16 Pages

PHI

飞利浦