丝印：74HC08；Package：SO14；Quad dual-input and gate

Features • High speed: tPD = 7 ns (typ.) at VCC = 6 V • Low power dissipation: ICC = 1 μA (max.) at TA = 25 °C • High noise immunity: VNIH = VNIL = 28 % VCC (min.) • Symmetrical output impedance: |IOH| = IOL = 4 mA (min) • Balanced propagation delays: tPLH ~= tPHL • Wide operating voltag

文件：354.79 Kbytes 页数：15 Pages

STMICROELECTRONICS

意法半导体

丝印：74HC08D；Package：SOIC14；CMOS Digital Integrated Circuits Silicon Monolithic

Functional Description • Quad 2-Input AND Gate General The 74HC08D is a high speed CMOS 2-INPUT AND GATE fabricated with silicon gate C2MOS technology. It achieves the high speed operation similar to equivalent LSTTL while maintaining the CMOS low power dissipation. The internal circuit is c

文件：173.9 Kbytes 页数：8 Pages

TOSHIBA

东芝

丝印：74HC08Y；Package：SO14(automotivegrade)；Quad dual-input and gate

Features • High speed: tPD = 7 ns (typ.) at VCC = 6 V • Low power dissipation: ICC = 1 μA (max.) at TA = 25 °C • High noise immunity: VNIH = VNIL = 28 % VCC (min.) • Symmetrical output impedance: |IOH| = IOL = 4 mA (min) • Balanced propagation delays: tPLH ~= tPHL • Wide operating voltag

文件：354.79 Kbytes 页数：15 Pages

STMICROELECTRONICS

意法半导体

丝印：74HC08D；Package：SOIC14；CMOS Digital Integrated Circuits Silicon Monolithic

Functional Description • Quad 2-Input AND Gate General The 74HC08D is a high speed CMOS 2-INPUT AND GATE fabricated with silicon gate C2MOS technology. It achieves the high speed operation similar to equivalent LSTTL while maintaining the CMOS low power dissipation. The internal circuit is c

文件：173.9 Kbytes 页数：8 Pages

TOSHIBA

东芝

丝印：14；Package：SOT762-1；Quad 2-input AND gate

DESCRIPTION The 74HC/HCT08 are high-speed Si-gate CMOS devices and are pin compatible with low power Schottky TTL (LSTTL). They are specified in compliance with JEDEC standard no. 7A. The 74HC/HCT08 provide the 2-input AND function. FEATURES • Complies with JEDEC standard no. 8-1A • ESD protec

文件：33.79 Kbytes 页数：5 Pages

PHI

飞利浦

丝印：14；Package：SOT108-1；Quad 2-input AND gate

DESCRIPTION The 74HC/HCT08 are high-speed Si-gate CMOS devices and are pin compatible with low power Schottky TTL (LSTTL). They are specified in compliance with JEDEC standard no. 7A. The 74HC/HCT08 provide the 2-input AND function. FEATURES • Complies with JEDEC standard no. 8-1A • ESD protec

文件：33.79 Kbytes 页数：5 Pages

PHI

飞利浦

丝印：14；Package：SOT337-1；Quad 2-input AND gate

DESCRIPTION The 74HC/HCT08 are high-speed Si-gate CMOS devices and are pin compatible with low power Schottky TTL (LSTTL). They are specified in compliance with JEDEC standard no. 7A. The 74HC/HCT08 provide the 2-input AND function. FEATURES • Complies with JEDEC standard no. 8-1A • ESD protec

文件：33.79 Kbytes 页数：5 Pages

PHI

飞利浦

丝印：14；Package：SOT27-1；Quad 2-input AND gate

DESCRIPTION The 74HC/HCT08 are high-speed Si-gate CMOS devices and are pin compatible with low power Schottky TTL (LSTTL). They are specified in compliance with JEDEC standard no. 7A. The 74HC/HCT08 provide the 2-input AND function. FEATURES • Complies with JEDEC standard no. 8-1A • ESD protec

文件：33.79 Kbytes 页数：5 Pages

PHI

飞利浦

丝印：14；Package：SOT402-1；Quad 2-input AND gate

DESCRIPTION The 74HC/HCT08 are high-speed Si-gate CMOS devices and are pin compatible with low power Schottky TTL (LSTTL). They are specified in compliance with JEDEC standard no. 7A. The 74HC/HCT08 provide the 2-input AND function. FEATURES • Complies with JEDEC standard no. 8-1A • ESD protec

文件：33.79 Kbytes 页数：5 Pages

PHI

飞利浦

Quad 2?묲nput AND Gate High?뭁erformance Silicon?묰ate CMOS

Quad 2−Input AND Gate High−Performance Silicon−Gate CMOS The 74HC08 is identical in pinout to the LS08. The device inputs are compatible with Standard CMOS outputs; with pullup resistors, they are compatible with LSTTL outputs. Features • Output Drive Capability: 10 LSTTL Loads • Outputs Dire

文件：126.91 Kbytes 页数：7 Pages

ONSEMI

安森美半导体