丝印：74HC04；Package：SO14；Hex inverter

Features  High speed: tPD = 8 ns (typ.) at VCC = 6 V  Low power dissipation: ICC = 1 μA (max.) at TA = 25 °C  High noise immunity: VNIH = VNIL = 28% VCC (min.)  Symmetrical output impedance: |IOH| = IOL = 4 mA (min) at VCC = 4.5 V  Balanced propagation delays: tPLH @ tPHL  Wid

文件：438.84 Kbytes 页数：13 Pages

STMICROELECTRONICS

意法半导体

丝印：74HC04D；Package：SOIC14；CMOS Digital Integrated Circuits Silicon Monolithic

Functional Description • Hex Inverter General The 74HC04D is a high speed CMOS INVERTER fabricated with silicon gate C2MOS technology. It achieves the high speed operation similar to equivalent LSTTL while maintaining the CMOS low power dissipation. The internal circuit is composed of 3 stag

文件：173.45 Kbytes 页数：8 Pages

TOSHIBA

东芝

丝印：74HC04Y；Package：SO14(automotivegrade)；Hex inverter

Features  High speed: tPD = 8 ns (typ.) at VCC = 6 V  Low power dissipation: ICC = 1 μA (max.) at TA = 25 °C  High noise immunity: VNIH = VNIL = 28% VCC (min.)  Symmetrical output impedance: |IOH| = IOL = 4 mA (min) at VCC = 4.5 V  Balanced propagation delays: tPLH @ tPHL  Wid

文件：438.84 Kbytes 页数：13 Pages

STMICROELECTRONICS

意法半导体

丝印：74HC04D；Package：SOIC14；CMOS Digital Integrated Circuits Silicon Monolithic

Functional Description • Hex Inverter General The 74HC04D is a high speed CMOS INVERTER fabricated with silicon gate C2MOS technology. It achieves the high speed operation similar to equivalent LSTTL while maintaining the CMOS low power dissipation. The internal circuit is composed of 3 stag

文件：173.45 Kbytes 页数：8 Pages

TOSHIBA

东芝

丝印：14；Package：SOT762-1；Hex inverter

GENERAL DESCRIPTION The 74HC/HCT04 are high-speed Si-gate CMOS devices and are pin compatible with low power Schottky TTL (LSTTL). They are specified in compliance with JEDEC standard no. 7A. The 74HC/HCT04 provide six inverting buffers. FEATURES • Output capability: standard • ICC c

文件：33.05 Kbytes 页数：5 Pages

PHI

飞利浦

丝印：14；Package：SOT108-1；Hex inverter

GENERAL DESCRIPTION The 74HC/HCT04 are high-speed Si-gate CMOS devices and are pin compatible with low power Schottky TTL (LSTTL). They are specified in compliance with JEDEC standard no. 7A. The 74HC/HCT04 provide six inverting buffers. FEATURES • Output capability: standard • ICC c

文件：33.05 Kbytes 页数：5 Pages

PHI

飞利浦

丝印：14；Package：SOT337-1；Hex inverter

GENERAL DESCRIPTION The 74HC/HCT04 are high-speed Si-gate CMOS devices and are pin compatible with low power Schottky TTL (LSTTL). They are specified in compliance with JEDEC standard no. 7A. The 74HC/HCT04 provide six inverting buffers. FEATURES • Output capability: standard • ICC c

文件：33.05 Kbytes 页数：5 Pages

PHI

飞利浦

丝印：14；Package：SOT27-1；Hex inverter

GENERAL DESCRIPTION The 74HC/HCT04 are high-speed Si-gate CMOS devices and are pin compatible with low power Schottky TTL (LSTTL). They are specified in compliance with JEDEC standard no. 7A. The 74HC/HCT04 provide six inverting buffers. FEATURES • Output capability: standard • ICC c

文件：33.05 Kbytes 页数：5 Pages

PHI

飞利浦

丝印：14；Package：SOT402-1；Hex inverter

GENERAL DESCRIPTION The 74HC/HCT04 are high-speed Si-gate CMOS devices and are pin compatible with low power Schottky TTL (LSTTL). They are specified in compliance with JEDEC standard no. 7A. The 74HC/HCT04 provide six inverting buffers. FEATURES • Output capability: standard • ICC c

文件：33.05 Kbytes 页数：5 Pages

PHI

飞利浦

Hex inverter

GENERAL DESCRIPTION The 74HC/HCT04 are high-speed Si-gate CMOS devices and are pin compatible with low power Schottky TTL (LSTTL). They are specified in compliance with JEDEC standard no. 7A. The 74HC/HCT04 provide six inverting buffers. FEATURES • Output capability: standard • ICC c

文件：33.05 Kbytes 页数：5 Pages

PHI

飞利浦