丝印：14；Package：SOT27-1；Quad 2-input NAND gate

DESCRIPTION The 74HC00/74HCT00 are high-speed Si-gate CMOS devices and are pin compatible with low power Schottky TTL (LSTTL). They are specified in compliance with JEDEC standard no. 7A. The 74HC00/74HCT00 provide the 2-input NAND function. FEATURES • Complies with JEDEC standard no. 8-1A •

文件：28.03 Kbytes 页数：5 Pages

PHI

飞利浦

Quad 2-input NAND gate

General description The 74HC00; 74HCT00 are high-speed Si-gate CMOS devices that comply with JEDEC standard no. 7A. They are pin compatible with Low-power Schottky TTL (LSTTL). The 74HC00; 74HCT00 provides a quad 2-input NAND function. Features and benefits ■ Input levels: ◆ For 74HC00: CM

文件：173.63 Kbytes 页数：15 Pages

恩XP

Quad 2-input NAND gate

General description The 74HC00; 74HCT00 are high-speed Si-gate CMOS devices that comply with JEDEC standard no. 7A. They are pin compatible with Low-power Schottky TTL (LSTTL). The 74HC00; 74HCT00 provides a quad 2-input NAND function. Features and benefits ■ Input levels: ◆ For 74HC00: CM

文件：130.33 Kbytes 页数：16 Pages

恩XP

Quad 2-input NAND gate

General description The 74HC00; 74HCT00 are high-speed Si-gate CMOS devices that comply with JEDEC standard no. 7A. They are pin compatible with Low-power Schottky TTL (LSTTL). The 74HC00; 74HCT00 provides a quad 2-input NAND function. Features and benefits  Input levels:  For 74HC00: CMO

文件：129.81 Kbytes 页数：16 Pages

恩XP

Quad 2-input NAND gate

1. General description The 74HC00; 74HCT00 is a quad 2-input NAND gate. Inputs include clamp diodes. This enables the use of current limiting resistors to interface inputs to voltages in excess of VCC. 2. Features and benefits • Wide supply voltage range from 2.0 to 6.0 V • CMOS low power dis

文件：239.87 Kbytes 页数：12 Pages

NEXPERIA

安世

Quad 2-input NAND gate

文件：98.98 Kbytes 页数：17 Pages

PHI

飞利浦