10-Bit Transparent Latch

General Description The 74F841 bus interface latch is designed to eliminate the extra packages required to buffer existing latches and provide extra data width for wider address/data paths or buses carrying parity. The 74F841 is a 10-bit transparent latch, a 10-bit version of the 74F373. Feature

文件：47.85 Kbytes 页数：6 Pages

FAIRCHILD

仙童半导体

Bus interface latches

74F841/74F842 10-bit bus interface latches, non-inverting/inverting (3-State) 74F843 9-bit bus interface latch, non-inverting (3-State) 74F845/74F846 8-bit bus interface latches, non-inverting/inverting (3-State) DESCRIPTION The 74F841–74F846 bus interface latch series are designed to provide

文件：206.8 Kbytes 页数：18 Pages

PHI

PHI

Bus interface latches

74F841/74F842 10-bit bus interface latches, non-inverting/inverting (3-State) 74F843 9-bit bus interface latch, non-inverting (3-State) 74F845/74F846 8-bit bus interface latches, non-inverting/inverting (3-State) DESCRIPTION The 74F841–74F846 bus interface latch series are designed to provide

文件：103.91 Kbytes 页数：12 Pages

PHI

PHI

10-Bit Transparent Latch

ONSEMI

安森美半导体

10-Bit Transparent Latch

General Description The 74F841 bus interface latch is designed to eliminate the extra packages required to buffer existing latches and provide extra data width for wider address/data paths or buses carrying parity. The 74F841 is a 10-bit transparent latch, a 10-bit version of the 74F373. Feature

文件：47.85 Kbytes 页数：6 Pages

FAIRCHILD

仙童半导体

10-Bit Transparent Latch

General Description The 74F841 bus interface latch is designed to eliminate the extra packages required to buffer existing latches and provide extra data width for wider address/data paths or buses carrying parity. The 74F841 is a 10-bit transparent latch, a 10-bit version of the 74F373. Feature

文件：47.85 Kbytes 页数：6 Pages

FAIRCHILD

仙童半导体

Package：24-DIP（0.300"，7.62mm）；包装：卷带（TR）剪切带（CT）Digi-Reel® 得捷定制卷带 类别：集成电路（IC） 锁存器 描述：IC LATCH TRANSP 10BIT 24-DIP

ONSEMI

安森美半导体