Dual D-Type Positive Edge-Triggered Flip-Flop

General Description The F74 is a dual D-type flip-flop with Direct Clear and Set inputs and complementary (Q, Q) outputs. Information at the input is transferred to the outputs on the positive edge of the clock pulse. Clock triggering occurs at a voltage level of the clock pulse and is not direct

文件：74.78 Kbytes 页数：7 Pages

FAIRCHILD

仙童半导体

Dual D-Type Positive Edge-Triggered Flip-Flop

文件：159.47 Kbytes 页数：8 Pages

NSC

国半

Dual D-Type Positive Edge-Triggered Flip-Flop

General Description The F74 is a dual D-type flip-flop with Direct Clear and Set inputs and complementary (Q, Q) outputs. Information at the input is transferred to the outputs on the positive edge of the clock pulse. Clock triggering occurs at a voltage level of the clock pulse and is not direct

文件：74.78 Kbytes 页数：7 Pages

FAIRCHILD

仙童半导体

Package：14-SOIC（0.154"，3.90mm 宽）；包装：袋 功能：设置（预设）和复位 类别：集成电路（IC） 触发器 描述：IC FF D-TYPE DUAL 1BIT 14SOIC

ONSEMI

安森美半导体

Package：14-SOIC（0.154"，3.90mm 宽）；包装：管件 功能：设置（预设）和复位 类别：集成电路（IC） 触发器 描述：IC FF D-TYPE DUAL 1BIT 14SOIC

ONSEMI

安森美半导体