74F651A中文资料飞利浦数据手册PDF规格书

DESCRIPTION

The 74F651A and 74F652A transceivers/registers consist of bus transceiver circuits with 3–State outputs, D–type flip–flops, and control circuitry arranged for multiplexed transmission of data directly from the input bus or the internal registers. Data on the A or B bus will be clocked into the registers as the appropriate clock pin goes high. Output enable (OEAB, OEBA) and select (SAB, SBA) pins are provided for bus management.

FEATURES

• Combines 74F245 and two 74F374 type functions in one chip

• High impedance base inputs for reduced loading (70µA in high and low states)

• Independent registers for A and B buses

• Multiplexed real-time and stored data

• Choice of non-inverting and inverting data paths

• 3-State outputs

• Industrial temperature range available (–40°C to +85°C) for 74F652A