74F552SC中文资料仙童半导体数据手册PDF规格书

General Description

The 74F552 octal transceiver contains two 8-bit registers for temporary storage of data flowing in either direction. Each register has its own clock pulse and clock enable input as well as a flag flip-flop that is set automatically as the register is loaded. The flag output will be reset when the output enable returns to HIGH after reading the output port. Each register has a separate output enable control for its 3-STATE buffer. The separate Clocks, Flags, and Enables provide considerable flexibility as I/O ports for demand-response data transfer.

特性 Features

■ 8-Bit bidirectional I/O Port with handshake

■ Register status flag flip-flops

■ Separate clock enable and output enable

■ Parity generation and parity check

■ B-outputs sink 64 mA

■ 3-STATE outputs