74F543中文资料Octal Registered Transceiver数据手册ONSEMI规格书

描述 Description

General Description
The F543 octal transceiver contains two sets of D-type latches for temporary storage of data flowing in either direction. Separate Latch Enable and Output Enable inputs are provided for each register to permit independent control of inputting and outputting in either direction of data flow. The A outputs are guaranteed to sink 24 mA while the B outputs are rated for 64 mA.

特性 Features

■ 8-bit octal transceiver
■ Back-to-back registers for storage
■ Separate controls for data flow in each direction
■ A outputs sink 24 mA
■ B outputs sink 64 mA

简介

74F543属于集成电路（IC）的缓冲器驱动器接收器收发器。由制造生产的74F543缓冲器，驱动器，接收器，收发器逻辑缓冲器、驱动器、接收器和收发器允许隔离对某个电路的逻辑信号的访问，以用于另一电路。缓冲器将其输入信号（不变或反相）传递到其输出，并可能用于清除弱信号或驱动负载。在布尔逻辑仿真器中，缓冲器主要用于增加传播延迟。逻辑接收器和收发器允许在数据总线之间进行隔离通信。