74CBTLVD3861PW集成电路（IC）的信号开关多路复用器解码器规格书PDF中文资料

厂商型号	74CBTLVD3861PW
参数属性	74CBTLVD3861PW 封装/外壳为24-TSSOP（0.173"，4.40mm 宽）；包装为卷带（TR）；类别为集成电路（IC）的信号开关多路复用器解码器；产品描述：IC BUS SWITCH 10 X 1:1 24TSSOP
功能描述	10-bit level-shifting bus switch with output enable
封装外壳	24-TSSOP（0.173"，4.40mm 宽）
文件大小	240.12 Kbytes
页面数量	14 页
生产厂商	Nexperia B.V. All rights reserved
企业简称	NEXPERIA【安世】
中文名称	安世半导体(中国)有限公司官网
原厂标识
数据手册	下载地址一下载地址二到原厂下载
更新时间	2025-6-23 13:49:00
人工找货	74CBTLVD3861PW价格和库存，欢迎联系客服免费人工找货

1. General description

The 74CBTLVD3861 is a 10-bit 3.3 V to 1.8 V level translating bus switch with one output enable

(OE) input. When OE is LOW, the switch is closed and port A is connected to the B port. When OE

is HIGH, the switch is disabled.

To ensure the high-impedance OFF-state during power-up or power-down, OE should be tied

to the VCC through a pull-up resistor. The minimum value of the resistor is determined by the

current-sinking capability of the driver.

Schmitt trigger action at control input makes the circuit tolerant to slower input rise and fall times

across the entire VCC range from 3.0 V to 3.6 V.

This device is fully specified for partial power-down applications using IOFF.

2. Features and benefits

• Supply voltage range from 3.0 V to 3.6 V

• High noise immunity

• Complies with JEDEC standard:

• JESD8-B/JESD36 (3.0 V to 3.6 V)

• ESD protection:

• HBM JESD22-A114F exceeds 2000 V

• CDM AEC-Q100-011 revision B exceeds 1000 V

• 4 Ω switch connection between two ports

• 3.3 V to 1.8 V level translation

• CMOS low power consumption

• Latch-up performance exceeds 250 mA per JESD78B Class I level A

• IOFF circuitry provides partial Power-down mode operation

• Specified from -40 °C to +85 °C and -40 °C to +125 °C