74CBTLV3125PW-Q100中文资料4-bit bus switch数据手册Nexperia规格书

描述 Description

The 74CBTLV3125-Q100 is a 4-bit high-speed bus switch with separate output enable inputs (1OE to 4OE). The low on-state resistance of the switch allows connections to be made with minimal propagation delay. The switch is disabled (high-impedance OFF-state) when the output enable (nOE) input is HIGH.
To ensure the high-impedance OFF-state during power-up or power-down, nOE should be tied to the VCC through a pull-up resistor. The minimum value of the resistor is determined by the current-sinking capability of the driver.
Schmitt trigger action at control input makes the circuit tolerant to slower input rise and fall times across the entire VCC range from 2.3 V to 3.6 V.
This device is fully specified for partial power-down applications using IOFF. The IOFF circuitry disables the output, preventing the damaging backflow current through the device when it is powered down.
This product has been qualified to the Automotive Electronics Council (AEC) standard Q100 (Grade 1) and is suitable for use in automotive applications

特性 Features

• Automotive product qualification in accordance with AEC-Q100 (Grade 1)
• Specified from -40 °C to +85 °C and from -40 °C to +125 °C

• Supply voltage range from 2.3 V to 3.6 V
• Standard ’125’-type pinout
• High noise immunity
• Complies with JEDEC standard:
• JESD8-5 (2.3 V to 2.7 V)
• JESD8-B/JESD36 (2.7 V to 3.6 V)

• ESD protection:
• MIL-STD-883, method 3015 exceeds 2000 V
• HBM JESD22-A114F exceeds 2000 V
• CDM AEC-Q100-011 revision B exceeds 1000 V

• 5 Ω switch connection between two ports
• Rail to rail switching on data I/O ports
• CMOS low power consumption
• Latch-up performance exceeds 250 mA per JESD78B Class I level A
• IOFF circuitry provides partial Power-down mode operation