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74AVC1T1004DP集成电路(IC)时钟缓冲器驱动器规格书PDF中文资料
厂商型号 |
74AVC1T1004DP |
参数属性 | 74AVC1T1004DP 封装/外壳为10-TFSOP,10-MSOP(0.118",3.00mm 宽);包装为管件;类别为集成电路(IC) > 时钟缓冲器,驱动器;产品描述:74AVC1T1004DP/SOT552/TSSOP10 |
功能描述 | 1-to-4 fan-out buffer |
文件大小 |
262.95 Kbytes |
页面数量 |
18 页 |
生产厂商 | Nexperia B.V. All rights reserved |
企业简称 |
NEXPERIA【安世】 |
中文名称 | 安世半导体(中国)有限公司官网 |
原厂标识 | |
数据手册 | |
更新时间 | 2024-5-11 18:25:00 |
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74AVC1T1004DP规格书详情
1. General description
The 74AVC1T1004 is a translating 1-to-4 fan-out buffer suitable for use in clock distribution. It has
dual supplies (VCC(A) and VCC(B)) for voltage translation. It also has a data input (A), four data
outputs (Yn) and an output enable input (OE). VCC(A) and VCC(B) can be independently supplied
at any voltage between 0.8 V and 3.6 V. It makes the device suitable for low voltage translation
between any of the following voltages: 0.8 V, 1.2 V, 1.5 V, 1.8 V, 2.5 V and 3.3 V. The levels of A
and OE are referenced to VCC(A), outputs Yn are referenced to VCC(B). This supply configuration
ensures that the fanned out signals can be used in level shifting. A HIGH on OE causes all outputs
to be pulled LOW via pull-down resistors, a LOW on OE disconnects the pull-down resistors and
enables all outputs.
Schmitt trigger action at all inputs makes the circuit tolerant for slower input rise and fall time.
The IOFF circuitry disables the output, preventing any damaging backflow current through the
device when it is powered down.
2. Features and benefits
• Wide supply voltage range:
• VCC(A): 0.8 V to 3.6 V
• VCC(B): 0.8 V to 3.6 V
• Complies with JEDEC standards:
• JESD8-12 (0.8 V to 1.3 V)
• JESD8-11 (0.9 V to 1.65 V)
• JESD8-7 (1.2 V to 1.95 V)
• JESD8-5 (1.8 V to 2.7 V)
• JESD8-B (2.7 V to 3.6 V)
• ESD protection:
• HBM ANSI/ESDA/JEDEC JS-001 Class 2 exceeds 2 kV
• CDM JESD22-C101 exceeds 1 kV
• Maximum data rates:
• 380 Mbit/s (≥ 1.8 V to 3.3 V translation)
• 200 Mbit/s (≥ 1.1 V to 3.3 V translation)
• 200 Mbit/s (≥ 1.1 V to 2.5 V translation)
• 200 Mbit/s (≥ 1.1 V to 1.8 V translation)
• 150 Mbit/s (≥ 1.1 V to 1.5 V translation)
• 100 Mbit/s (≥ 1.1 V to 1.2 V translation)
• Latch-up performance exceeds 100 mA per JESD 78 Class II
• Inputs accept voltages up to 3.6 V
• Specified from -40 °C to +85 °C and -40 °C to +125 °C
74AVC1T1004DP属于集成电路(IC) > 时钟缓冲器,驱动器。安世半导体(中国)有限公司制造生产的74AVC1T1004DP时钟缓冲器,驱动器时钟缓冲器和驱动器集成电路产品族中的产品用于帮助信号在系统中传输,常用作频率/时间参考信号,以同步系统内的活动。尽管这些器件最常用到的功能就是缓冲(即,为使信号不受驱动负载的影响而从某个信号源复制信号),但是该产品族中的某些器件还能执行其他功能,例如选择性改变缓冲信号路径、按某个整数值分割信号频率,或进行所用电信号格式转换。
产品属性
- 产品编号:
74AVC1T1004DPJ
- 制造商:
Nexperia USA Inc.
- 类别:
集成电路(IC) > 时钟缓冲器,驱动器
- 系列:
74AVC
- 包装:
管件
- 类型:
扇出缓冲器(分配)
- 电路数:
1
- 比率 - 输入:
1:4
- 差分 - 输入:
无/无
- 输入:
时钟
- 输出:
时钟
- 电压 - 供电:
0.8V ~ 3.6V
- 工作温度:
-40°C ~ 125°C(TA)
- 安装类型:
表面贴装型
- 封装/外壳:
10-TFSOP,10-MSOP(0.118",3.00mm 宽)
- 供应商器件封装:
10-TSSOP
- 描述:
74AVC1T1004DP/SOT552/TSSOP10
供应商 | 型号 | 品牌 | 批号 | 封装 | 库存 | 备注 | 价格 |
---|---|---|---|---|---|---|---|
Nexperia(安世) |
23+ |
TSSOP103mm |
6000 |
询价 | |||
NXP/恩智浦 |
23+ |
10-MSOP |
90000 |
只做原厂渠道价格优势可提供技术支持 |
询价 | ||
NXP |
1822+ |
10-MSOP |
9852 |
只做原装正品假一赔十为客户做到零风险!! |
询价 | ||
Nexperia(安世) |
1942+ |
TSSOP-10 |
2532 |
向鸿只做原装,仓库库存优势数量请确认 |
询价 | ||
NXP |
10-MSOP |
608900 |
原包原标签100%进口原装常备现货! |
询价 | |||
Nexper |
21+ |
25000 |
原厂原包 深圳现货 主打品牌 假一赔百 可开票! |
询价 | |||
Nexperia(安世) |
23+ |
X2QFN10(1 |
5001 |
原装现货,免费供样,技术支持,原厂对接 |
询价 | ||
NXP(恩智浦) |
23+ |
10TSSOP |
7350 |
现货供应,当天可交货!免费送样,原厂技术支持!!! |
询价 | ||
NXP-恩智浦 |
24+25+/26+27+ |
TSSOP-10 |
9328 |
一一有问必回一特殊渠道一有长期订货一备货HK仓库 |
询价 | ||
NXP |
22+ |
10-TSSOP |
2500 |
市场最低 原装现货 假一罚百 可开原型号 |
询价 |