74AUP2G08GX集成电路（IC）的门反相器规格书PDF中文资料

厂商型号	74AUP2G08GX
参数属性	74AUP2G08GX 封装/外壳为8-XFDFN 裸露焊盘；包装为卷带（TR）剪切带（CT）Digi-Reel® 得捷定制卷带；类别为集成电路（IC）的门反相器；产品描述：IC GATE AND 2CH 2-INP 8X2SON
功能描述	Low-power dual 2-input AND gate
丝印标识	pE
封装外壳	SOT1233-2 / 8-XFDFN 裸露焊盘
文件大小	292.24 Kbytes
页面数量	19 页
生产厂商	NEXPERIA
中文名称	安世
网址	网址
数据手册	下载地址一下载地址二到原厂下载
更新时间	2025-12-13 23:00:00
人工找货	74AUP2G08GX价格和库存，欢迎联系客服免费人工找货

1. General description

The 74AUP2G08 is a dual 2-input AND gate. Schmitt-trigger action at all inputs makes the circuit

tolerant of slower input rise and fall times. This device ensures very low static and dynamic power

consumption across the entire VCC range from 0.8 V to 3.6 V.

This device is fully specified for partial power down applications using IOFF. The IOFF circuitry

disables the output, preventing the potentially damaging backflow current through the device when

it is powered down.

2. Features and benefits

• Wide supply voltage range from 0.8 V to 3.6 V

• High noise immunity

• CMOS low power dissipation

• Low static power consumption; ICC = 0.9 μA (maximum)

• Latch-up performance exceeds 100 mA per JESD78 Class II

• Overvoltage tolerant inputs to 3.6 V

• Low noise overshoot and undershoot < 10 of VCC

• IOFF circuitry provides partial Power-down mode operation

• Latch-up performance exceeds 100 mA per JESD 78 Class II Level B

• Complies with JEDEC standards:

• JESD8-12 (0.8 V to 1.3 V)

• JESD8-11 (0.9 V to 1.65 V)

• JESD8-7 (1.2 V to 1.95 V)

• JESD8-5 (1.8 V to 2.7 V)

• JESD8-B (2.7 V to 3.6 V)

• ESD protection:

• HBM JESD22-A114F Class 3A exceeds 5000 V

• MM JESD22-A115-A exceeds 200 V

• CDM JESD22-C101E exceeds 1000 V

• Multiple package options

• Specified from -40 °C to +85 °C and -40 °C to +125 °C