74AUP1T58GW集成电路（IC）的转换器电平移位器规格书PDF中文资料

厂商型号	74AUP1T58GW
参数属性	74AUP1T58GW 封装/外壳为6-TSSOP，SC-88，SOT-363；包装为卷带（TR）剪切带（CT）Digi-Reel® 得捷定制卷带；类别为集成电路（IC）的转换器电平移位器；产品描述：IC LP CONFIG GATE V-XLATR 6TSSOP
功能描述	Low-power configurable gate with voltage-level translator
丝印标识	a8
封装外壳	SOT363-2 / 6-TSSOP，SC-88，SOT-363
文件大小	267.5 Kbytes
页面数量	18 页
生产厂商	NEXPERIA Nexperia B.V. All rights reserved
中文名称	安世安世半导体(中国)有限公司
网址	网址
数据手册	下载地址一下载地址二到原厂下载
更新时间	2025-8-7 14:42:00
人工找货	74AUP1T58GW价格和库存，欢迎联系客服免费人工找货

1. General description

The 74AUP1T58 is a configurable multiple function gate with level translating, Schmitt-trigger

inputs. The device can be configured as any of the following logic functions AND, OR, NAND,

NOR, XOR, inverter and buffer; using the 3-bit input. All inputs can be connected directly to VCC or

GND. Low threshold Schmitt trigger inputs allow these devices to be driven by 1.8 V logic levels in

3.3 V applications.

This device ensures very low static and dynamic power consumption across the entire VCC range

from 2.3 V to 3.6 V. This device is fully specified for partial power down applications using IOFF. The

IOFF circuitry disables the output, preventing the potentially damaging backflow current through the

device when it is powered down.

2. Features and benefits

• Wide supply voltage range from 2.3 V to 3.6 V

• High noise immunity

• Low static power consumption; ICC = 1.5 μA (maximum)

• Latch-up performance exceeds 100 mA per JESD 78 Class II Level B

• Overvoltage tolerant inputs to 3.6 V

• Low noise overshoot and undershoot < 10 of VCC

• IOFF circuitry provides partial power-down mode operation

• ESD protection:

• HBM JESD22-A114F Class 3A exceeds 5000 V

• MM JESD22-A115-A exceeds 200 V

• CDM JESD22-C101E exceeds 1000 V

• Multiple package options

• Specified from -40 °C to +85 °C and -40 °C to +125 °C