74AUP1T34GM-Q100中文资料Low-power dual supply translating buffer数据手册Nexperia规格书

描述 Description

The 74AUP1T34-Q100 provides a single buffer with two separate supply voltages. InputA is designed to track VCC(A). OutputY is designed to track VCC(Y). Both, VCC(A) and VCC(Y) accepts any supply voltage from 1.1V to 3.6V. This feature allows universal low voltage interfacing between any of the 1.2V, 1.5V, 1.8V, 2.5V, and 3.3V voltage nodes.
Schmitt trigger action at all inputs makes the circuit tolerant to slower input rise and fall times across the entire VCC range from 1.1V to 3.6V. This device ensures a very low static and dynamic power consumption across the entire VCC range from 1.1V to 3.6V. This device is fully specified for partial power-down applications using IOFF. The IOFF circuitry disables the output, preventing the damaging backflow current through the device when it is powered down.
This product has been qualified to the Automotive Electronics Council (AEC) standard Q100 (Grade 1) and is suitable for use in automotive applications.

特性 Features

• Automotive product qualification in accordance with AEC-Q100 (Grade 1)
• Specified from -40°C to +85°C and from -40°C to +125°C

• Wide supply voltage range from 1.1 V to 3.6V
• High noise immunity
• Complies with JEDEC standards:
• JESD8-7 (1.2 V to 1.95V)
• JESD8-5 (1.8 V to 2.7V)
• JESD8-B (2.7 V to 3.6V)

• ESD protection:
• MIL-STD-883, method 3015 Class 3A. Exceeds 5000 V
• HBM JESD22-A114F Class 3A. Exceeds 5000 V
• MM JESD22-A115-A exceeds 200 V (C = 200pF, R = 0Ω)

• Wide supply voltage range:
• VCC(A): 1.1 V to 3.6 V
• VCC(Y): 1.1 V to 3.6 V

• Low static power consumption; ICC = 0.9μA (maximum)
• Each port operates over the full 1.1 V to 3.6 V power supply range
• Latch-up performance exceeds 100mA per JESD 78 Class II
• Inputs accept voltages up to 3.6 V
• Low noise overshoot and undershoot < 10 % of VCC
• IOFF circuitry provides partial Power-down mode operation