74AUP1G3208GX集成电路（IC）的门反相器-多功能可配置规格书PDF中文资料

厂商型号	74AUP1G3208GX
参数属性	74AUP1G3208GX 封装/外壳为6-XFDFN；包装为卷带（TR）剪切带（CT）Digi-Reel® 得捷定制卷带；类别为集成电路（IC）的门反相器-多功能可配置；产品描述：74AUP1G3208GX/SOT1255/X2SON6
功能描述	Low-power 3-input OR-AND gate
丝印标识	A2
封装外壳	SOT1255-2 / 6-XFDFN
文件大小	276.79 Kbytes
页面数量	18 页
生产厂商	Nexperia B.V. All rights reserved
企业简称	NEXPERIA【安世】
中文名称	安世半导体(中国)有限公司官网
原厂标识
数据手册	下载地址一下载地址二到原厂下载
更新时间	2025-6-22 19:04:00
人工找货	74AUP1G3208GX价格和库存，欢迎联系客服免费人工找货

1. General description

The 74AUP1G3208 is a single 3-input OR-AND gate. Schmitt-trigger action at all inputs makes the

circuit tolerant of slower input rise and fall times. This device ensures very low static and dynamic

power consumption across the entire VCC range from 0.8 V to 3.6 V. This device is fully specified

for partial power down applications using IOFF. The IOFF circuitry disables the output, preventing the

potentially damaging backflow current through the device when it is powered down.

2. Features and benefits

• Wide supply voltage range from 0.8 V to 3.6 V

• High noise immunity

• Complies with JEDEC standards:

• JESD8-12 (0.8 V to 1.3 V)

• JESD8-11 (0.9 V to 1.65 V)

• JESD8-7 (1.65 V to 1.95 V)

• JESD8-5 (2.3 V to 2.7 V)

• JESD8C (2.7 V to 3.6 V)

• ESD protection:

• HBM JESD22-A114F Class 3A exceeds 5000 V

• MM JESD22-A115-A exceeds 200 V

• CDM JESD22-C101E exceeds 1000 V

• Low static power consumption; ICC = 0.9 μA (maximum)

• Latch-up performance exceeds 100 mA per JESD 78 Class II

• Overvoltage tolerant inputs to 3.6 V

• Low noise overshoot and undershoot < 10 of VCC

• IOFF circuitry provides partial Power-down mode operation

• Multiple package options

• Specified from -40 °C to +85 °C and -40 °C to +125 °C