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74AUP1G157GW数据手册集成电路(IC)的信号开关多路复用器解码器规格书PDF

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厂商型号

74AUP1G157GW

参数属性

74AUP1G157GW 封装/外壳为6-TSSOP,SC-88,SOT-363;包装为卷带(TR)剪切带(CT)Digi-Reel® 得捷定制卷带;类别为集成电路(IC)的信号开关多路复用器解码器;产品描述:IC MULTIPLEXER 1 X 2:1 6TSSOP

功能描述

Low-power 2-input multiplexer

封装外壳

6-TSSOP,SC-88,SOT-363

制造商

Nexperia Nexperia B.V. All rights reserved

中文名称

安世 安世半导体(中国)有限公司

数据手册

下载地址下载地址二

更新时间

2025-8-7 23:00:00

人工找货

74AUP1G157GW价格和库存,欢迎联系客服免费人工找货

74AUP1G157GW规格书详情

描述 Description

The 74AUP1G157 is a single 2-input multiplexer which selects data from two data inputs (I0andI1) under control of a common data select input (S). The state of the common data select input determines the particular register from which the data comes. The output (Y) presents the selected data in the true (non-inverted) form.
Schmitt trigger action at all inputs makes the circuit tolerant to slower input rise and fall times across the entire VCC range from 0.8 V to 3.6 V.
This device ensures a very low static and dynamic power consumption across the entire VCC range from 0.8 V to 3.6 V.
This device is fully specified for partial power-down applications using IOFF. The IOFF circuitry disables the output, preventing the damaging backflow current through the device when it is powered down.

特性 Features

• Wide supply voltage range from 0.8 V to 3.6 V
• High noise immunity
• Complies with JEDEC standards:
• JESD8-12 (0.8 V to 1.3 V)
• JESD8-11 (0.9 V to 1.65 V)
• JESD8-7 (1.2 V to 1.95 V)
• JESD8-5 (1.8 V to 2.7 V)
• JESD8-B (2.7 V to 3.6 V)

• ESD protection:
• HBM JESD22-A114F Class 3A exceeds 5000 V
• MM JESD22-A115-A exceeds 200 V
• CDM JESD22-C101E exceeds 1000 V

• Low static power consumption; ICC = 0.9 µA (maximum)
• Latch-up performance exceeds 100 mA per JESD 78 Class II
• Inputs accept voltages up to 3.6 V
• Low noise overshoot and undershoot < 10 % of VCC
• IOFF circuitry provides partial Power-down mode operation
• Multiple package options
• Specified from -40 °C to +85 °C and -40 °C to +125 °C

技术参数

  • 制造商编号

    :74AUP1G157GW

  • 生产厂家

    :Nexperia

  • VCC (V)

    :0.8 - 3.6

  • Logic switching levels

    :CMOS

  • Output drive capability (mA)

    :1.9 / -1.9

  • tpd (ns)

    :3.2

  • Power dissipation considerations

    :ultra low

  • Tamb (°C)

    :-40~125

  • Rth(j-a) (K/W)

    :264

  • Ψth(j-top) (K/W)

    :38.6

  • Rth(j-c) (K/W)

    :153

  • Package name

    :TSSOP6

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