74AUP1G14中文资料Single-gate数据手册Diodes规格书

描述 Description

The Advanced Ultra Low Power (AUP) CMOS logic family is designed for low power and extended battery life in portable applications.

The AUP1G14 is a single 1-input Schmitt-trigger inverter gate with a standard push-pull output designed for operation over a power supply range of 0.8V to 3.6V. The device is fully specified for partial power down applications using IOFF. The IOFF circuitry disables the output preventing damaging current backflow when the device is powered down.

特性 Features

•Advanced Ultra Low Power (AUP) CMOS•Supply Voltage Range from 0.8V to 3.6V•± 4mA Output Drive at 3.0V•Low Static power consumption

应用 Application

•Suited for battery and low power needs•Wide array of products such as:

简介

74AUP1G14属于集成电路（IC）的门反相器。由制造生产的74AUP1G14门和反相器逻辑栅极和逆变器系列中的产品对单个逻辑信号执行基本逻辑运算（例如 AND、NOT、OR 等）。与触发器不同，它们不能够存储信息，不会对提供给其输入的信号立即做出响应。虽然早就被集成电路实施形式所取代，以用于实现复杂功能，但分立栅极仍可在仅需要非常简单逻辑功能的情况下使用。