首页 >74ALVCH162373>规格书列表
| 型号 | 下载 订购 | 功能描述 | 制造商 上传企业 | LOGO |
|---|---|---|---|---|
74ALVCH162373 | Low Voltage 16-Bit Transparent Latch with Bushold and 26??Series Resistors in Outputs General Description The ALVCH162373 contains sixteen non-inverting latches with 3-STATE outputs and is intended for bus oriented applications. The device is byte controlled. The flip-flops appear to be transparent to the data when the Latch enable (LE) is HIGH. When LE is LOW, the data that meets 文件:96 Kbytes 页数:6 Pages | FAIRCHILD 仙童半导体 | FAIRCHILD | |
74ALVCH162373 | Low Voltage 16-Bit Transparent Latch with Bushold and 26Ω Series Resistors in Outputs General Description\nThe ALVCH162373 contains sixteen non-inverting latches with 3-STATE outputs and is intended for bus oriented applications. The device is byte controlled. The flip-flops appear to be transparent to the data when the Latch enable (LE) is HIGH. When LE is LOW, the data that meets t ■ 1.65V to 3.6V VCC supply operation\n■ 3.6V tolerant control inputs and outputs\n■ Bushold on data inputs eliminates the need for external pull-up/pull-down resistors\n■ 26Ω series resistors in outputs\n■ tPD (In to On)\n 3.8 ns max for 3.0V to 3.6V VCC\n 5.0 ns max for 2.3V to 2.7V VCC\n 9.0; | ONSEMI 安森美半导体 | ONSEMI | |
74ALVCH162373 | 3.3V CMOS 16-Bit Transparent D-Type Latch with 3-State Outputs and Bus-Hold The 74ALVCH162373 16-bit transparent D-type latch is particularly suitable for implementing buffer registers, I/O ports, bidirectional bus drivers, and working registers. This device can be used as two 8-bit latches or one16-bit latch. The 74ALVCH162373 has series resistors in the device output stru Typical tSK(o) (Output Skew) ESD > 2000V per MIL-STD-883, Method 3015\n> 200V using machine model (C = 200pF, R = 0)\nVCC = 3.3V ± 0.3V, Normal Range\nVCC = 2.7V to 3.6V, Extended Range\nVCC = 2.5V ± 0.2V\nCMOS power levels (0.4 uW typ. static)\nRail-to-Rail output swing for increased noise margin\n; | Renesas 瑞萨 | Renesas | |
丝印:ALVCH162373;Package:TSSOP;16-BIT TRANSPARENT D-TYPE LATCH WITH 3-STATE OUTPUTS FEATURES · Member of the Texas Instruments Widebus™ Family · Bus Hold on Data Inputs Eliminates the Need for External Pullup/Pulldown Resistors · Output Ports Have Equivalent 26-W Series Resistors, So No External Resistors Are Required · Latch-Up Performance Exceeds 250 mA Per JESD 17 · 文件:462.3 Kbytes 页数:17 Pages | TI 德州仪器 | TI | ||
16-BIT TRANSPARENT D-TYPE LATCH WITH 3-STATE OUTPUTS FEATURES · Member of the Texas Instruments Widebus™ Family · Bus Hold on Data Inputs Eliminates the Need for External Pullup/Pulldown Resistors · Output Ports Have Equivalent 26-W Series Resistors, So No External Resistors Are Required · Latch-Up Performance Exceeds 250 mA Per JESD 17 · 文件:458.24 Kbytes 页数:16 Pages | TI 德州仪器 | TI | ||
3.3V CMOS 16-BIT TRANS- PARENT D-TYPE LATCH WITH 3-STATE OUTPUTS AND BUS-HOLD FEATURES: • 0.5 MICRON CMOS Technology • Typical tSK(o) (Output Skew) 2000V per MIL-STD-883, Method 3015; > 200V using machine model (C = 200pF, R = 0) • VCC = 3.3V ± 0.3V, Normal Range • VCC = 2.7V to 3.6V, Extended Range • VCC = 2.5V ± 0.2V • CMOS power levels (0.4μ W typ 文件:256.769 Kbytes 页数:7 Pages | RENESAS 瑞萨 | RENESAS | ||
3.3V CMOS 16-BIT TRANS- PARENT D-TYPE LATCH WITH 3-STATE OUTPUTS AND BUS-HOLD FEATURES: • 0.5 MICRON CMOS Technology • Typical tSK(o) (Output Skew) 2000V per MIL-STD-883, Method 3015; > 200V using machine model (C = 200pF, R = 0) • VCC = 3.3V ± 0.3V, Normal Range • VCC = 2.7V to 3.6V, Extended Range • VCC = 2.5V ± 0.2V • CMOS power levels (0.4μ W typ 文件:256.769 Kbytes 页数:7 Pages | RENESAS 瑞萨 | RENESAS | ||
3.3V CMOS 16-BIT TRANS- PARENT D-TYPE LATCH WITH 3-STATE OUTPUTS AND BUS-HOLD FEATURES: • 0.5 MICRON CMOS Technology • Typical tSK(o) (Output Skew) 2000V per MIL-STD-883, Method 3015; > 200V using machine model (C = 200pF, R = 0) • VCC = 3.3V ± 0.3V, Normal Range • VCC = 2.7V to 3.6V, Extended Range • VCC = 2.5V ± 0.2V • CMOS power levels (0.4μ W typ 文件:256.769 Kbytes 页数:7 Pages | RENESAS 瑞萨 | RENESAS | ||
3.3V CMOS 16-BIT TRANS- PARENT D-TYPE LATCH WITH 3-STATE OUTPUTS AND BUS-HOLD FEATURES: • 0.5 MICRON CMOS Technology • Typical tSK(o) (Output Skew) 2000V per MIL-STD-883, Method 3015; > 200V using machine model (C = 200pF, R = 0) • VCC = 3.3V ± 0.3V, Normal Range • VCC = 2.7V to 3.6V, Extended Range • VCC = 2.5V ± 0.2V • CMOS power levels (0.4μ W typ 文件:256.769 Kbytes 页数:7 Pages | RENESAS 瑞萨 | RENESAS | ||
Low Voltage 16-Bit Transparent Latch with Bushold and 26??Series Resistors in Outputs General Description The ALVCH162373 contains sixteen non-inverting latches with 3-STATE outputs and is intended for bus oriented applications. The device is byte controlled. The flip-flops appear to be transparent to the data when the Latch enable (LE) is HIGH. When LE is LOW, the data that meets 文件:96 Kbytes 页数:6 Pages | FAIRCHILD 仙童半导体 | FAIRCHILD |
详细参数
- 型号:
74ALVCH162373
- 制造商:
FAIRCHILD
- 制造商全称:
Fairchild Semiconductor
- 功能描述:
Low Voltage 16-Bit Transparent Latch with Bushold and 26з Series Resistors in Outputs
| 供应商 | 型号 | 品牌 | 批号 | 封装 | 库存 | 备注 | 价格 |
|---|---|---|---|---|---|---|---|
TI |
23+ |
2800 |
正品原装货价格低 |
询价 | |||
IDT |
05+ |
SOIC |
1000 |
自己公司全新库存绝对有货 |
询价 | ||
原厂 |
25+ |
450 |
百分百原装正品 真实公司现货库存 本公司只做原装 可 |
询价 | |||
TI |
16+ |
JRBGA |
10000 |
原装正品 |
询价 | ||
FSC/ON |
23+ |
原包装原封 □□ |
4647 |
原装进口特价供应 特价,原装元器件供应,支持开发样品 更多详细咨询 库存 |
询价 | ||
TI |
20+ |
NA |
53650 |
TI原装主营-可开原型号增税票 |
询价 | ||
Integrated Device Technology ( |
2022+ |
1 |
全新原装 货期两周 |
询价 | |||
FAIRCHILD |
24+ |
TSSOP48 |
65200 |
一级代理/放心采购 |
询价 | ||
IDT |
1931+ |
N/A |
1186 |
加我qq或微信,了解更多详细信息,体验一站式购物 |
询价 | ||
FAIRCHILD/仙童 |
2447 |
TSSOP48 |
100500 |
一级代理专营品牌!原装正品,优势现货,长期排单到货 |
询价 |
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