74ALVC00PW数据手册集成电路（IC）的门反相器规格书PDF

描述 Description

The 74ALVC00 is a quad 2-input NAND gate.
Schmitt trigger action on all inputs makes the device tolerant of slow rise and fall times.

特性 Features

• Wide supply voltage range from 1.65 V to 3.6 V
• 3.6 V tolerant inputs/outputs
• CMOS low power consumption
• Direct interface with TTL levels (2.7 V to 3.6 V)
• Power-down mode
• Latch-up performance exceeds 250 mA
• Complies with JEDEC standard:
• JESD8-7 (1.65 V to 1.95 V)
• JESD8-5 (2.3 V to 2.7 V)
• JESD8B/JESD36 (2.7 V to 3.6 V)

• ESD protection:
• HBM JESD22-A114E exceeds 2000 V
• MM JESD22-A115-A exceeds 200 V