74ACT16652DLR集成电路（IC）的缓冲器驱动器接收器收发器规格书PDF中文资料

74ACT16652DLR属于集成电路（IC）的缓冲器驱动器接收器收发器。由美国德州仪器公司制造生产的74ACT16652DLR缓冲器，驱动器，接收器，收发器逻辑缓冲器、驱动器、接收器和收发器允许隔离对某个电路的逻辑信号的访问，以用于另一电路。缓冲器将其输入信号（不变或反相）传递到其输出，并可能用于清除弱信号或驱动负载。在布尔逻辑仿真器中，缓冲器主要用于增加传播延迟。逻辑接收器和收发器允许在数据总线之间进行隔离通信。

Members of the Texas Instruments

WidebusE Family

Inputs Are TTL-Voltage Compatible

Independent Registers and Enables for A

and B Buses

Multiplexed Real-Time and Stored Data

Flow-Through Architecture Optimizes

PCB Layout

Distributed VCC and GND Pin Configuration

Minimizes High-Speed Switching Noise

EPICE (Enhanced-Performance Implanted

CMOS) 1-mm Process

500-mA Typical Latch-Up Immunity at

125°C

Package Options Include Plastic 300-mil

Shrink Small-Outline (DL) Packages Using

25-mil Center-to-Center Pin Spacings and

380-mil Fine-Pitch Ceramic Flat (WD)

Packages Using 25-mil Center-to-Center

Spacings

description

The ’ACT16652 are 16-bit bus transceivers

consisting of D-type flip-flops and control circuitry

arranged for multiplexed transmission of data

directly from the data bus or from the internal

storage registers. The devices can be used as two

8-bit transceivers or one 16-bit transceiver.

Complementary output-enable (OEAB and

OEBA) inputs are provided to control the

transceiver functions. Select-control (SAB and

SBA) inputs are provided to select whether

real-time or stored data is transferred. A low input

level selects real-time data, and a high input level

selects stored data. The circuitry used for select

control eliminates the typical decoding glitch that

occurs in a multiplexer during the transition

between stored and real-time data. Figure 1

illustrates the four fundamental bus-management

functions that can be performed with the

’ACT16652.

Data on the A or B bus, or both, can be stored in the internal D flip-flops by low-to-high transitions at the

appropriate clock (CLKAB or CLKBA) inputs, regardless of the levels on the select-control or output-enable

inputs. When SAB and SBA are in the real-time transfer mode, it is also possible to store data without using the

internal D-type flip-flops by simultaneously enabling OEAB and OEBA. In this configuration, each output

reinforces its input. Thus, when all other data sources to the two sets of bus lines are at high impedance, each

set of bus lines remains at its last state.

The 74ACT16652 is packaged in TI’s shrink small-outline package, which provides twice the I/O pin count and

functionality of standard small-outline packages in the same printed-circuit-board area.

The 54ACT16652 is characterized for operation over the full military temperature range of –55°C to 125°C. The

74ACT16652 is characterized for operation from –40°C to 85°C.