74ACT161集成电路（IC）的计数器除法器规格书PDF中文资料

74ACT161属于集成电路（IC）的计数器除法器。由意法半导体集团制造生产的74ACT161计数器，除法器计数器和除法器 IC 是数字逻辑器件，可对输入发生的逻辑转换进行计数，然后使用多个并行输出重新发送累加的计数，和/或生成单个输出信号转换，从而对应用某些整数数量输入信号转换进行响应。除了简单的事件计数，它们还可用于各种频率合成应用。

DESCRIPTION

The 74ACT161 is an advanced high-speed CMOS SYNCRONOUS PRESETTABLE COUNTER fabricated with sub-micron silicon gate and double-layer metal wiring C2MOS tecnology. It is a 4 bit binary counter with Asynchronous Clear.

The circuit have four fundamental modes of operation, in order of preference: synchronous reset, parallel load, count-up and hold. Four control inputs, (CLEAR), (LOAD), (PE) and (TE), determine the mode of operation as shown in the Truth Table. A LOW signal on CLEAR overrides counting and parallel loading and sets all outputs on LOW state. A LOW signal on LOAD overrides counting and allows information on Parallel Data inputs to be loaded into the flip-flop on the next rising edge of CLOCK. With LOAD and CLEAR HIGH, PE and TE permit counting when both are HIGH. Conversely, a LOW signal on either PE and TE inhibits counting.

The CARRY OUTPUT is HIGH when TE is HIGH and counter is in state 15.

The device is designed to interface directly High Speed CMOS systems with TTL, NMOS and CMOS output voltage levels.

All inputs and outputs are equipped with protection circuits against static discharge, giving them 2KV ESD immunity and transient excess voltage.

■ HIGH SPEED:

fMAX = 290MHz (TYP.) at VCC = 5V

■ LOW POWER DISSIPATION:

ICC = 8µA(MAX.) at TA=25°C

■ COMPATIBLE WITH TTL OUTPUTS

VIH = 2V (MIN.), VIL = 0.8V (MAX.)

■ 50Ω TRANSMISSION LINE DRIVING CAPABILITY

■ SYMMETRICAL OUTPUT IMPEDANCE:

|IOH| = IOL = 24mA (MIN)

■ BALANCED PROPAGATION DELAYS: tPLH ≅ tPHL

■ OPERATING VOLTAGE RANGE:

VCC (OPR) = 4.5V to 5.5V

■ PIN AND FUNCTION COMPATIBLE WITH 74 SERIES 161

■ IMPROVED LATCH-UP IMMUNITY