74ACT11374DBLE中文资料德州仪器数据手册PDF规格书

Eight D-Type Flip-Flops in a Single Package

3-State Bus Driving True Outputs

Full Parallel Access for Loading

Inputs Are TTL-Voltage Compatible

Flow-Through Architecture Optimizes

PCB Layout

Center-Pin VCC and GND Configurations

Minimize High-Speed Switching Noise

EPIC (Enhanced-Performance Implanted

CMOS) 1-
m Process

500-mA Typical Latch-Up Immunity at

125°C

Package Options Include Plastic

Small-Outline (DW) and Shrink

Small-Outline (DB) Packages, and Standard

Plastic 300-mil DIPs (NT)

description

This 8-bit flip-flop features 3-state outputs designed specifically for driving highly-capacitive or relatively

low-impedance loads. It is particularly suitable for implementing buffer registers, I/O ports, bidirectional bus

drivers, and working registers.

The eight flip-flops of the 74ACT11374 are edge-triggered D-type flip-flops. On the positive transition of the clock

(CLK) input, the Q outputs are set to the logic levels set up at the data (D) inputs.

An output-enable (OE) input can be used to place the eight outputs in either a normal logic state (high or low

logic levels) or a high-impedance state. In the high-impedance state, the outputs neither load nor drive the bus

lines significantly. The high-impedance third state provides the capability to drive bus lines in a bus-organized

system without need for interface or pullup components.

OE does not affect the internal operation of the flip-flops. Old data can be retained or new data can be entered

while the outputs are in the high-impedance state.

The 74ACT11374 is characterized for operation from –40°C to 85°C.