74ACT11032N.A中文资料德州仪器数据手册PDF规格书

Inputs Are TTL-Voltage Compatible

Center-Pin VCC and GND Configurations to

Minimize High-Speed Switching Noise

EPIC (Enhanced-Performance Implanted

CMOS) 1-
m Process

500-mA Typical Latch-Up Immunity at 125°C

Package Options Include Plastic

Small-Outline Packages (D), Plastic Shrink

Small-Outline Packages (DB), Plastic Thin

Shrink Small-Outline Packages (PW), and

Standard Plastic 300-mil DIPs (N)

description

This device contains four independent 2-input OR gates. It performs the Boolean function Y = A + B or

Y
A • B in positive logic.

The 74ACT11032 is characterized for operation from –40°C to 85°C.