74AC11086N.A中文资料德州仪器数据手册PDF规格书

Center-Pin VCC and GND Configurations

Minimize High-Speed Switching Noise

EPICE (Enhanced-Performance Implanted

CMOS) 1-mm Process

500-mA Typical Latch-Up Immunity at

125°C

Package Options Include Plastic

Small-Outline (D) Packages and Standard

Plastic 300-mil DIPs (N)

description

This device contains four independent 2-input exclusive-OR gates. It performs the Boolean function

Y = A x B = AB + AB in positive logic.

A common application is as a true/complement element. If one of the inputs is low, the other input is reproduced

in true form at the output. If one of the inputs is high, the signal on the other input is reproduced inverted at the

output.

The 74AC11086 is characterized for operation from –40°C to 85°C.