Dual JK Positive Edge-Triggered Flip-Flop

General Description The AC/ACT109 consists of two high-speed completely independent transition clocked JK flip-flops. The clocking operation is independent of rise and fall times of the clock waveform. The JK design allows operation as a D-Type flip-flop (refer to AC/ACT74 data sheet) by connecti

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FAIRCHILD

仙童半导体

Dual JK Positive Edge-Triggered Flip-Flop

Features ■ ICC reduced by 50% ■ Outputs source/sink 24mA ■ ACT109 has TTL-compatible inputs General Description The AC/ACT109 consists of two high-speed completely independent transition clocked JK flip-flops. The clocking operation is independent of rise and fall times of the clock wav

文件：349.95 Kbytes 页数：12 Pages

ONSEMI

安森美半导体

Dual JK Positive Edge-Triggered Flip-Flop

文件：339.62 Kbytes 页数：12 Pages

FAIRCHILD

仙童半导体

Package：16-TSSOP（0.173"，4.40mm 宽）；包装：管件 功能：设置（预设）和复位 类别：集成电路（IC） 触发器 描述：IC FF JK TYPE DUAL 1BIT 16TSSOP

ONSEMI

安森美半导体

Package：16-TSSOP（0.173"，4.40mm 宽）；包装：管件 功能：设置（预设）和复位 类别：集成电路（IC） 触发器 描述：IC FF JK TYPE DUAL 1BIT 16TSSOP

ONSEMI

安森美半导体