Octal D-type flip-flop

DESCRIPTION The 74ABT273A has eight edge-triggered D-type flip-flops with individual D inputs and Q outputs. FEATURES • Eight edge-triggered D-type flip-flops • Buffered common clock • Buffered asynchronous Master Reset • Power-up reset • See 74ABT377 for clock enable version • See 74ABT37

文件：104.15 Kbytes 页数：12 Pages

PHI

飞利浦

Octal D-type flip-flop

DESCRIPTION The 74ABT273A has eight edge-triggered D-type flip-flops with individual D inputs and Q outputs. FEATURES • Eight edge-triggered D-type flip-flops • Buffered common clock • Buffered asynchronous Master Reset • Power-up reset • See 74ABT377 for clock enable version • See 74ABT37

文件：104.15 Kbytes 页数：12 Pages

PHI

飞利浦

Octal D-type flip-flop

DESCRIPTION The 74ABT273A has eight edge-triggered D-type flip-flops with individual D inputs and Q outputs. FEATURES • Eight edge-triggered D-type flip-flops • Buffered common clock • Buffered asynchronous Master Reset • Power-up reset • See 74ABT377 for clock enable version • See 74ABT37

文件：104.15 Kbytes 页数：12 Pages

PHI

飞利浦

Octal D-Type Flip-Flop

General Description The ABT273 has eight edge-triggered D-type flip-flops with individual D inputs and Q outputs. The common buffered Clock (CP) and Master Reset (MR) inputs load and reset (clear) all flip-flops simultaneously. The register is fully edge-triggered. The state of each D input, one

文件：112.29 Kbytes 页数：9 Pages

Fairchild

仙童半导体