18-bit latched transceiver with 16-bit parity generator/checker 3-State

DESCRIPTION The 74ABT/H16899 is a 16-bit to 16-bit parity transceiver with separate transparent latches for the A bus and B bus. Either bus can generate or check parity. The parity bit can be fed-through with no change or the generated parity can be substituted with the SEL input. FEATURES • Sy

文件：105.46 Kbytes 页数：16 Pages

PHI

PHI

18-bit latched transceiver with 16-bit parity generator/checker 3-State

DESCRIPTION The 74ABT/H16899 is a 16-bit to 16-bit parity transceiver with separate transparent latches for the A bus and B bus. Either bus can generate or check parity. The parity bit can be fed-through with no change or the generated parity can be substituted with the SEL input. FEATURES • Sy

文件：105.46 Kbytes 页数：16 Pages

PHI

PHI

18-bit latched transceiver with 16-bit parity generator/checker 3-State

DESCRIPTION The 74ABT/H16899 is a 16-bit to 16-bit parity transceiver with separate transparent latches for the A bus and B bus. Either bus can generate or check parity. The parity bit can be fed-through with no change or the generated parity can be substituted with the SEL input. FEATURES • Sy

文件：105.46 Kbytes 页数：16 Pages

PHI

PHI

原厂

NEXPERIA

安世

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TSSOP-24

TI

德州仪器

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