72V851中文资料8K x 9 DualSync FIFO, 3.3V数据手册Renesas规格书

描述 Description

The 72V851is a 8K x 9 dual synchronous FIFO that is functionally equivalent to two 72V251 FIFOs in a single package with all associated control, data, and flag lines assigned to separate pins. Each FIFOs has a 9-bit input and output data port. The Read Clock can be tied to the Write Clock for single clock operation or the two clocks can run asynchronous of one another for dual clock operation.

特性 Features

Offers optimal combination of capacity, speed, and design flexibility in small footprint
Ideal for prioritization, bidirectional, and width expansion applications
10 ns read/write cycle time
5V input tolerant
Separate control lines and data lines for each FIFO
Separate Empty, Full, programmable Almost-Empty and Almost-Full flags for each FIFO
Enable puts output data lines in high-impedance state
Available in 64-pin TQFP andSTQFP packages
Industrial temperature range (–40C to +85C) is available