1K x 36 SyncFIFO, 3.3V

The 72V3643 is a 1K x 36 Sync FIFO that is a 3.3V version of the 723643. The clocks for each port are independent of one another and can be asynchronous or coincident. The enables for each port are arranged to provide a simple bidirectional interface between microprocessors and/or buses with synchro ·Clock frequencies up to 100 MHz (6.5 ns access time)\n·Programmable Almost-Empty and Almost-Full flags\n·Serial or parallel programming of partial flags\n·Port B bus sizing of 36 bits (long word), 18 bits (word) and 9 bits (byte)\n·Big- or Little-Endian format for word and byte bus sizes\n·Reset cl;

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3.3 VOLT CMOS SyncFIFOTM WITH BUS-MATCHING 256 x 36 1,024 x 36

FEATURES: • Memory storage capacity: IDT72V3623–256 x 36 IDT72V3643–1,024 x 36 • Clock frequencies up to 100 MHz (6.5 ns access time) • Clocked FIFO buffering data from Port A to Port B • IDT Standard timing (using EF and FF) or First Word Fall Through Timing (using OR and IR flag functions

文件：365.65 Kbytes 页数：29 Pages

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3.3 VOLT CMOS SyncFIFOTM WITH BUS-MATCHING 256 x 36 1,024 x 36

FEATURES: • Memory storage capacity: IDT72V3623–256 x 36 IDT72V3643–1,024 x 36 • Clock frequencies up to 100 MHz (6.5 ns access time) • Clocked FIFO buffering data from Port A to Port B • IDT Standard timing (using EF and FF) or First Word Fall Through Timing (using OR and IR flag functions

文件：365.65 Kbytes 页数：29 Pages

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3.3 VOLT CMOS SyncFIFOTM WITH BUS-MATCHING 256 x 36 1,024 x 36

FEATURES: • Memory storage capacity: IDT72V3623–256 x 36 IDT72V3643–1,024 x 36 • Clock frequencies up to 100 MHz (6.5 ns access time) • Clocked FIFO buffering data from Port A to Port B • IDT Standard timing (using EF and FF) or First Word Fall Through Timing (using OR and IR flag functions

文件：365.65 Kbytes 页数：29 Pages

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瑞萨

3.3 VOLT CMOS SyncFIFOTM WITH BUS-MATCHING 256 x 36 1,024 x 36

FEATURES: • Memory storage capacity: IDT72V3623–256 x 36 IDT72V3643–1,024 x 36 • Clock frequencies up to 100 MHz (6.5 ns access time) • Clocked FIFO buffering data from Port A to Port B • IDT Standard timing (using EF and FF) or First Word Fall Through Timing (using OR and IR flag functions

文件：365.65 Kbytes 页数：29 Pages

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3.3 VOLT CMOS SyncFIFO WITH

文件：213.7 Kbytes 页数：28 Pages

IDT

3.3 VOLT CMOS SyncFIFO WITH

文件：213.7 Kbytes 页数：28 Pages

IDT

3.3 VOLT CMOS SyncFIFO WITH

文件：213.7 Kbytes 页数：28 Pages

IDT

3.3 VOLT CMOS SyncFIFO WITH

文件：213.7 Kbytes 页数：28 Pages

IDT

Package：128-LQFP；包装：托盘 功能：同步 类别：集成电路（IC） FIFO 存储器 描述：IC SYNCFIFO 1024X36 10NS 128TQFP

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