3.3 VOLT CMOS SuperSync FIFO™ 32,768 x 18 65,536 x 18

FEATURES: • Choose among the following memory organizations: IDT72V275 32,768 x 18 IDT72V285 65,536 x 18 • Pin-compatible with the IDT72V255/72V265 SuperSync FIFOs • 10ns read/write cycle time (6.5ns access time) • Fixed, low first word data latency time • Auto power down minimizes standby

文件：553.1 Kbytes 页数：26 Pages

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32K x 18 SuperSync FIFO, 3.3V

The 72V275 is a 32K x 18 SuperSync FIFO memory with clocked read and write controls. It's a functionally compatible version of the 72275 designed to run off a 3.3V supply for very low power consumption. The Frequency Select pin (FS) has been removed, thus it is no longer necessary to select which of Pin-compatible with the 72V2x5 SuperSync FIFOs\nFunctionally compatible with the 5 Volt 722x5 family\n10ns read/write cycle time (6.5ns access time)\nFixed, low first word data latency time\nAuto power down minimizes standby power consumption\nRetransmit operation with fixed, low first word data lat;

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瑞萨

3.3 VOLT CMOS SuperSync FIFO

文件：205.26 Kbytes 页数：25 Pages

IDT

3.3 VOLT CMOS SuperSync FIFO

文件：205.26 Kbytes 页数：25 Pages

IDT

3.3 VOLT CMOS SuperSync FIFO

文件：205.26 Kbytes 页数：25 Pages

IDT

3.3 VOLT CMOS SuperSync FIFO

文件：205.26 Kbytes 页数：25 Pages

IDT

3.3 VOLT CMOS SuperSync FIFO

文件：205.26 Kbytes 页数：25 Pages

IDT

3.3 VOLT CMOS SuperSync FIFO

文件：205.26 Kbytes 页数：25 Pages

IDT

3.3 VOLT CMOS SuperSync FIFO

文件：205.26 Kbytes 页数：25 Pages

IDT

3.3 VOLT CMOS SuperSync FIFO

文件：205.26 Kbytes 页数：25 Pages

IDT